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| author | Stefano Babic <sbabic@denx.de> | 2016-12-16 09:53:52 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2016-12-16 09:53:52 +0100 |
| commit | f2465934b46235287e07473fa4919035ba1a2b68 (patch) | |
| tree | ce6d4480a31d592dfee52222b620329a9c75b055 /arch/arm/mach-socfpga/Kconfig | |
| parent | 51efabac487d832632f9797a94ed2ba6fe98e718 (diff) | |
| parent | 53e8ca22538c2cec691fe74098684a359302688c (diff) | |
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'arch/arm/mach-socfpga/Kconfig')
| -rw-r--r-- | arch/arm/mach-socfpga/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig index d91b8bbceb..6991af8775 100644 --- a/arch/arm/mach-socfpga/Kconfig +++ b/arch/arm/mach-socfpga/Kconfig @@ -74,6 +74,10 @@ config TARGET_SOCFPGA_TERASIC_DE0_NANO bool "Terasic DE0-Nano-Atlas (Cyclone V)" select TARGET_SOCFPGA_CYCLONE5 +config TARGET_SOCFPGA_TERASIC_DE1_SOC + bool "Terasic DE1-SoC (Cyclone V)" + select TARGET_SOCFPGA_CYCLONE5 + config TARGET_SOCFPGA_TERASIC_SOCKIT bool "Terasic SoCkit (Cyclone V)" select TARGET_SOCFPGA_CYCLONE5 @@ -84,6 +88,7 @@ config SYS_BOARD default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO + default "de1-soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "is1" if TARGET_SOCFPGA_IS1 default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT @@ -98,6 +103,7 @@ config SYS_VENDOR default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO + default "terasic" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT config SYS_SOC @@ -107,6 +113,7 @@ config SYS_CONFIG_NAME default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO + default "socfpga_de1_soc" if TARGET_SOCFPGA_TERASIC_DE1_SOC default "socfpga_is1" if TARGET_SOCFPGA_IS1 default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT |