diff options
| author | Ley Foon Tan <ley.foon.tan@intel.com> | 2019-11-27 15:55:25 +0800 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2020-01-07 14:38:33 +0100 |
| commit | a6e5b06bea5f6bd98c184f1049e49ebd123538c7 (patch) | |
| tree | c5eb7c7a500ba42968a66790a5e1240e2f2ab839 /arch/arm/mach-socfpga/wrap_pll_config_s10.c | |
| parent | fec7ddc1907c1c86be6849de0fab7466b79cd834 (diff) | |
arm: agilex: Add clock handoff offset for Agilex
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Diffstat (limited to 'arch/arm/mach-socfpga/wrap_pll_config_s10.c')
| -rw-r--r-- | arch/arm/mach-socfpga/wrap_pll_config_s10.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-socfpga/wrap_pll_config_s10.c b/arch/arm/mach-socfpga/wrap_pll_config_s10.c index b266a5817b..3da85791a1 100644 --- a/arch/arm/mach-socfpga/wrap_pll_config_s10.c +++ b/arch/arm/mach-socfpga/wrap_pll_config_s10.c @@ -33,7 +33,8 @@ const struct cm_config * const cm_get_default_config(void) const unsigned int cm_get_osc_clk_hz(void) { #ifdef CONFIG_SPL_BUILD - u32 clock = readl(S10_HANDOFF_CLOCK_OSC); + + u32 clock = readl(HANDOFF_CLOCK_OSC); writel(clock, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD1); @@ -50,7 +51,7 @@ const unsigned int cm_get_intosc_clk_hz(void) const unsigned int cm_get_fpga_clk_hz(void) { #ifdef CONFIG_SPL_BUILD - u32 clock = readl(S10_HANDOFF_CLOCK_FPGA); + u32 clock = readl(HANDOFF_CLOCK_FPGA); writel(clock, socfpga_get_sysmgr_addr() + SYSMGR_SOC64_BOOT_SCRATCH_COLD2); |