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authorMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-22 00:27:41 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2015-09-25 00:59:33 +0900
commit019df879a93e266ac19f5eb00e4ee605db279b14 (patch)
treeb11ab5f86fa406775d870b1a51b2cf44fc8f7acc /arch/arm/mach-uniphier/board_early_init_f.c
parent28f40d4a4db2b6c701d349fd4fac286d21369de2 (diff)
ARM: uniphier: add ProXstream2 and PH1-LD6b support
The DDR SDRAM initialization code has not been mainlined yet, but U-Boot proper should work. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/mach-uniphier/board_early_init_f.c')
-rw-r--r--arch/arm/mach-uniphier/board_early_init_f.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c
index fb4927222c..5e0d246ce4 100644
--- a/arch/arm/mach-uniphier/board_early_init_f.c
+++ b/arch/arm/mach-uniphier/board_early_init_f.c
@@ -48,6 +48,20 @@ int board_early_init_f(void)
ph1_pro5_clk_init();
break;
#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2)
+ case SOC_UNIPHIER_PROXSTREAM2:
+ proxstream2_pin_init();
+ led_puts("U1");
+ proxstream2_clk_init();
+ break;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B)
+ case SOC_UNIPHIER_PH1_LD6B:
+ ph1_ld6b_pin_init();
+ led_puts("U1");
+ proxstream2_clk_init();
+ break;
+#endif
default:
break;
}