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authorKever Yang <kever.yang@rock-chips.com>2017-05-15 20:52:16 +0800
committerSimon Glass <sjg@chromium.org>2017-06-07 07:29:20 -0600
commit1960b0103420a74ae5b154ed8684785036e2235b (patch)
tree30f953ef8d11259b60f5603cdd4bd4ad4d2a9b71 /arch/arm
parent37943aaeea55011d48a0a492838c50111ba2a37e (diff)
rockchip: clock: rk3036: some fix according TRM
- hclk/pclk_div range should use '<=' instead of '<' - use GPLL for pd_bus clock source - pd_bus HCLK/PCLK clock rate should not bigger than ACLK Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/include/asm/arch-rockchip/cru_rk3036.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
index eb5eb40027..22278e11ac 100644
--- a/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
+++ b/arch/arm/include/asm/arch-rockchip/cru_rk3036.h
@@ -16,9 +16,9 @@
#define CORE_PERI_HZ 150000000
#define CORE_ACLK_HZ 300000000
-#define CPU_ACLK_HZ 150000000
-#define CPU_HCLK_HZ 300000000
-#define CPU_PCLK_HZ 300000000
+#define BUS_ACLK_HZ 148500000
+#define BUS_HCLK_HZ 148500000
+#define BUS_PCLK_HZ 74250000
#define PERI_ACLK_HZ 148500000
#define PERI_HCLK_HZ 148500000