diff options
| author | Shaveta Leekha <shaveta@freescale.com> | 2014-05-28 14:18:55 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-06-05 13:45:07 -0700 |
| commit | b6808cd82d616bec2c357fb1b95116efe5b6f98c (patch) | |
| tree | d594585e8814f6f20d5d70a3f34545e4794ed887 /arch/powerpc/cpu/mpc85xx/cmd_errata.c | |
| parent | 9855b3beca648dabe4d86b06d36bf219ebd0732d (diff) | |
powerpc/serdes: Add the workaround for erratum A-007186
SerDes PLL is calibrated at reset. When the junction temperature
delta from the time the PLL is calibrated exceeds +56C/-66C,
jitter may increase and can cause PLL to unlock.
This workaround overwrite the SerDes registers with new values,
to calibrate SerDes registers.
These values are known to work fine for all temperature ranges.
This workaround is valid for B4, T4 and T2 platforms, so
added in their config.
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com>
[York Sun: replaced typedef ccsr_sfp_regs_t with struct ccsr_sfp_regs]
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cmd_errata.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index f69c834897..3a04a89301 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -269,6 +269,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) #ifdef CONFIG_SYS_FSL_ERRATUM_USB14 puts("Work-around for Erratum USB14 enabled\n"); #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_A007186 + puts("Work-around for Erratum A007186 enabled\n"); +#endif #ifdef CONFIG_SYS_FSL_ERRATUM_A006593 puts("Work-around for Erratum A006593 enabled\n"); #endif |