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authorBin Meng <bmeng.cn@gmail.com>2015-07-22 01:21:10 -0700
committerSimon Glass <sjg@chromium.org>2015-07-28 10:36:24 -0600
commit53832bb8d62df6c369edf3fbb6c9dd4b5ed38710 (patch)
tree042b2203ed6fcf8a234cb1199adf66bfa17e7599 /arch/x86/cpu/qemu
parentabab912813169e9f24e12b9a0a993b0c6060c808 (diff)
x86: mpspec: Move writing ISA interrupt entry after PCI
On some platforms the I/O APIC interrupt pin#0-15 may be connected to platform pci devices' interrupt pin. In such cases the legacy ISA IRQ is not available so we should not write ISA interrupt entry if it is already occupied. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu/qemu')
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