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authorTom Rini <trini@konsulko.com>2019-08-09 23:27:15 -0400
committerTom Rini <trini@konsulko.com>2019-08-09 23:27:15 -0400
commit9fd8b2c8c714b383b6768d53d7b46682fdf87013 (patch)
tree47d9b59ac1129e9bf71a065d5f3c526d1ada15a5 /arch/x86/cpu/slimbootloader/slimbootloader.c
parent188f0109055300a099f90bedd96b0e93d28acfbd (diff)
parentdbaec467671fd5b56cf380121340844863f5472d (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Enable SD slot on Intel Edison - Populate CSRT ACPI table for shared DMA controller on Intel Tangier - Convert Intel ICH-SPI driver to use new spi-mem ops - Enable config_distro_bootcmd for QEMU x86 - Support U-Boot as a payload for Intel Slim Bootloader - Avoid writing temporary asl files into the source tree which fixes the parallel build issue occasionally seen
Diffstat (limited to 'arch/x86/cpu/slimbootloader/slimbootloader.c')
-rw-r--r--arch/x86/cpu/slimbootloader/slimbootloader.c58
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/x86/cpu/slimbootloader/slimbootloader.c b/arch/x86/cpu/slimbootloader/slimbootloader.c
new file mode 100644
index 0000000000..e6b174ca88
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/slimbootloader.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <asm/arch/slimbootloader.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/**
+ * This sets tsc_base and clock_rate for early_timer and tsc_timer.
+ * The performance info guid hob has all performance timestamp data, but
+ * the only tsc frequency info is used for the timer driver for now.
+ *
+ * Slim Bootloader already calibrated TSC and provides it to U-Boot.
+ * Therefore, U-Boot does not have to re-calibrate TSC.
+ * Configuring tsc_base and clock_rate here makes x86 tsc_timer driver
+ * bypass TSC calibration and use the provided TSC frequency.
+ */
+static void tsc_init(void)
+{
+ struct sbl_performance_info *data;
+ const efi_guid_t guid = SBL_PERFORMANCE_INFO_GUID;
+
+ if (!gd->arch.hob_list)
+ panic("hob list not found!");
+
+ gd->arch.tsc_base = rdtsc();
+ debug("tsc_base=0x%llx\n", gd->arch.tsc_base);
+
+ data = hob_get_guid_hob_data(gd->arch.hob_list, NULL, &guid);
+ if (!data) {
+ debug("performance info hob not found\n");
+ return;
+ }
+
+ /* frequency is in KHz, so to Hz */
+ gd->arch.clock_rate = data->frequency * 1000;
+ debug("freq=0x%lx\n", gd->arch.clock_rate);
+}
+
+int arch_cpu_init(void)
+{
+ tsc_init();
+
+ return x86_cpu_init_f();
+}
+
+int checkcpu(void)
+{
+ return 0;
+}
+
+int print_cpuinfo(void)
+{
+ return default_print_cpuinfo();
+}