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authorTom Rini <trini@konsulko.com>2019-08-09 23:27:15 -0400
committerTom Rini <trini@konsulko.com>2019-08-09 23:27:15 -0400
commit9fd8b2c8c714b383b6768d53d7b46682fdf87013 (patch)
tree47d9b59ac1129e9bf71a065d5f3c526d1ada15a5 /arch/x86/cpu/start.S
parent188f0109055300a099f90bedd96b0e93d28acfbd (diff)
parentdbaec467671fd5b56cf380121340844863f5472d (diff)
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Enable SD slot on Intel Edison - Populate CSRT ACPI table for shared DMA controller on Intel Tangier - Convert Intel ICH-SPI driver to use new spi-mem ops - Enable config_distro_bootcmd for QEMU x86 - Support U-Boot as a payload for Intel Slim Bootloader - Avoid writing temporary asl files into the source tree which fixes the parallel build issue occasionally seen
Diffstat (limited to 'arch/x86/cpu/start.S')
-rw-r--r--arch/x86/cpu/start.S6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/x86/cpu/start.S b/arch/x86/cpu/start.S
index 4a82add76b..71cd70f9cd 100644
--- a/arch/x86/cpu/start.S
+++ b/arch/x86/cpu/start.S
@@ -97,7 +97,7 @@ early_board_init_ret:
jmp car_init
.globl car_init_ret
car_init_ret:
-#ifndef CONFIG_HAVE_FSP
+#ifndef CONFIG_USE_HOB
/*
* We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
* or fully initialised SDRAM - we really don't care which)
@@ -137,12 +137,13 @@ car_init_ret:
/* Get address of global_data */
mov %fs:0, %edx
-#ifdef CONFIG_HAVE_FSP
+#ifdef CONFIG_USE_HOB
/* Store the HOB list if we have one */
test %esi, %esi
jz skip_hob
movl %esi, GD_HOB_LIST(%edx)
+#ifdef CONFIG_HAVE_FSP
/*
* After fsp_init() returns, the stack has already been switched to a
* place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
@@ -151,6 +152,7 @@ car_init_ret:
*/
subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
movl %esp, GD_MALLOC_BASE(%edx)
+#endif
skip_hob:
#else
/* Store table pointer */