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authorBin Meng <bmeng.cn@gmail.com>2015-07-30 03:49:18 -0700
committerSimon Glass <sjg@chromium.org>2015-08-05 08:42:39 -0600
commitfe3fbd302427b3690c4d682c1d7d03ca94771afd (patch)
treef39bd9aa82a8b1157bf6e1437b1b5cfac5d8e5c7 /arch/x86/cpu
parent9b911bed78c3926fe1129dcc6b0ffbca667dff74 (diff)
x86: bayleybay: Configure PCI IRQ
Add PCI IRQ routing information in the board device tree and enable writing PIRQ routing table and MP table. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/x86/cpu')
-rw-r--r--arch/x86/cpu/baytrail/valleyview.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86/cpu/baytrail/valleyview.c b/arch/x86/cpu/baytrail/valleyview.c
index 9915da5bd7..d8d2b8d418 100644
--- a/arch/x86/cpu/baytrail/valleyview.c
+++ b/arch/x86/cpu/baytrail/valleyview.c
@@ -7,6 +7,7 @@
#include <common.h>
#include <mmc.h>
#include <pci_ids.h>
+#include <asm/irq.h>
#include <asm/post.h>
static struct pci_device_id mmc_supported[] = {
@@ -35,3 +36,10 @@ int arch_cpu_init(void)
return 0;
}
+
+int arch_misc_init(void)
+{
+ pirq_init();
+
+ return 0;
+}