Merge branch 'master' of git://git.denx.de/u-boot-uniphier

16 files changed, 61 insertions, 87 deletions

diff --git a/arch/arm/dts/uniphier-ld11-global.dts b/arch/arm/dts/uniphier-ld11-global.dts
index 11be2aa05e..744b36e28a 100644
--- a/arch/arm/dts/uniphier-ld11-global.dts
+++ b/arch/arm/dts/uniphier-ld11-global.dts
@@ -54,12 +54,13 @@
 	sound {
 		compatible = "audio-graph-card";
 		label = "UniPhier LD11";
-		widgets = "Headphone", "Headphone Jack";
+		widgets = "Headphone", "Headphones";
 		dais = <&i2s_port2
 			&i2s_port3
 			&i2s_port4
 			&spdif_port0
 			&comp_spdif_port0>;
+		hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>;
 	};
 
 	spdif-out {
diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 3f9237cfa4..d63b56e944 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -407,7 +407,7 @@
 			reg = <0x5a000000 0x400>;
 			interrupts = <0 78 4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_emmc_1v8>;
+			pinctrl-0 = <&pinctrl_emmc>;
 			clocks = <&sys_clk 4>;
 			resets = <&sys_rst 4>;
 			bus-width = <8>;
diff --git a/arch/arm/dts/uniphier-ld20-global.dts b/arch/arm/dts/uniphier-ld20-global.dts
index fe6608ea32..1a5e7c24b9 100644
--- a/arch/arm/dts/uniphier-ld20-global.dts
+++ b/arch/arm/dts/uniphier-ld20-global.dts
@@ -54,12 +54,13 @@
 	sound {
 		compatible = "audio-graph-card";
 		label = "UniPhier LD20";
-		widgets = "Headphone", "Headphone Jack";
+		widgets = "Headphone", "Headphones";
 		dais = <&i2s_port2
 			&i2s_port3
 			&i2s_port4
 			&spdif_port0
 			&comp_spdif_port0>;
+		hp-det-gpio = <&gpio UNIPHIER_GPIO_IRQ(0) GPIO_ACTIVE_LOW>;
 	};
 
 	spdif-out {
diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 6ffbf18a8c..9970497039 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -58,6 +58,7 @@
 			clocks = <&sys_clk 32>;
 			enable-method = "psci";
 			operating-points-v2 = <&cluster0_opp>;
+			#cooling-cells = <2>;
 		};
 
 		cpu2: cpu@100 {
@@ -77,6 +78,7 @@
 			clocks = <&sys_clk 33>;
 			enable-method = "psci";
 			operating-points-v2 = <&cluster1_opp>;
+			#cooling-cells = <2>;
 		};
 	};
 
@@ -512,7 +514,7 @@
 			reg = <0x5a000000 0x400>;
 			interrupts = <0 78 4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_emmc_1v8>;
+			pinctrl-0 = <&pinctrl_emmc>;
 			clocks = <&sys_clk 4>;
 			resets = <&sys_rst 4>;
 			bus-width = <8>;
@@ -527,7 +529,7 @@
 		};
 
 		sd: sdhc@5a400000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a400000 0x800>;
 			interrupts = <0 76 4>;
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index 4545056ba7..f505f643f7 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -225,13 +225,13 @@
 		};
 
 		sd: sdhc@5a400000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a400000 0x200>;
 			interrupts = <0 76 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default", "uhs";
 			pinctrl-0 = <&pinctrl_sd>;
-			pinctrl-1 = <&pinctrl_sd_1v8>;
+			pinctrl-1 = <&pinctrl_sd_uhs>;
 			clocks = <&mio_clk 0>;
 			reset-names = "host", "bridge";
 			resets = <&mio_rst 0>, <&mio_rst 3>;
@@ -243,20 +243,19 @@
 		};
 
 		emmc: sdhc@5a500000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a500000 0x200>;
 			interrupts = <0 78 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_emmc>;
-			pinctrl-1 = <&pinctrl_emmc_1v8>;
 			clocks = <&mio_clk 1>;
-			reset-names = "host", "bridge";
-			resets = <&mio_rst 1>, <&mio_rst 4>;
+			reset-names = "host", "bridge", "hw";
+			resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
 			bus-width = <8>;
-			non-removable;
 			cap-mmc-highspeed;
 			cap-mmc-hw-reset;
+			non-removable;
 		};
 
 		usb0: usb@5a800100 {
diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi
index 9dd9d49ad7..aeb47b0ffe 100644
--- a/arch/arm/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/dts/uniphier-pinctrl.dtsi
@@ -56,11 +56,6 @@
 		function = "emmc";
 	};
 
-	pinctrl_emmc_1v8: emmc-1v8 {
-		groups = "emmc", "emmc_dat8";
-		function = "emmc";
-	};
-
 	pinctrl_ether_mii: ether-mii {
 		groups = "ether_mii";
 		function = "ether_mii";
@@ -126,7 +121,7 @@
 		function = "sd";
 	};
 
-	pinctrl_sd_1v8: sd-1v8 {
+	pinctrl_sd_uhs: sd-uhs {
 		groups = "sd";
 		function = "sd";
 	};
@@ -136,11 +131,6 @@
 		function = "sd1";
 	};
 
-	pinctrl_sd1_1v8: sd1-1v8 {
-		groups = "sd1";
-		function = "sd1";
-	};
-
 	pinctrl_system_bus: system-bus {
 		groups = "system_bus", "system_bus_cs1";
 		function = "system_bus";
diff --git a/arch/arm/dts/uniphier-pro4-ref.dts b/arch/arm/dts/uniphier-pro4-ref.dts
index 198add3409..06065eb36c 100644
--- a/arch/arm/dts/uniphier-pro4-ref.dts
+++ b/arch/arm/dts/uniphier-pro4-ref.dts
@@ -70,10 +70,6 @@
 	status = "okay";
 };
 
-&sd1 {
-	status = "okay";
-};
-
 &usb2 {
 	status = "okay";
 };
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 8185b54e28..8974844541 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -259,13 +259,13 @@
 		};
 
 		sd: sdhc@5a400000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a400000 0x200>;
 			interrupts = <0 76 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default", "uhs";
 			pinctrl-0 = <&pinctrl_sd>;
-			pinctrl-1 = <&pinctrl_sd_1v8>;
+			pinctrl-1 = <&pinctrl_sd_uhs>;
 			clocks = <&mio_clk 0>;
 			reset-names = "host", "bridge";
 			resets = <&mio_rst 0>, <&mio_rst 3>;
@@ -277,37 +277,33 @@
 		};
 
 		emmc: sdhc@5a500000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a500000 0x200>;
 			interrupts = <0 78 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_emmc>;
-			pinctrl-1 = <&pinctrl_emmc_1v8>;
 			clocks = <&mio_clk 1>;
-			reset-names = "host", "bridge";
-			resets = <&mio_rst 1>, <&mio_rst 4>;
+			reset-names = "host", "bridge", "hw";
+			resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
 			bus-width = <8>;
-			non-removable;
 			cap-mmc-highspeed;
 			cap-mmc-hw-reset;
+			non-removable;
 		};
 
 		sd1: sdhc@5a600000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a600000 0x200>;
 			interrupts = <0 85 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_sd1>;
-			pinctrl-1 = <&pinctrl_sd1_1v8>;
 			clocks = <&mio_clk 2>;
+			reset-names = "host", "bridge";
 			resets = <&mio_rst 2>, <&mio_rst 5>;
 			bus-width = <4>;
 			cap-sd-highspeed;
-			sd-uhs-sdr12;
-			sd-uhs-sdr25;
-			sd-uhs-sdr50;
 		};
 
 		usb2: usb@5a800100 {
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 6aea9af2b6..6e0ea7976e 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -480,30 +480,29 @@
 		};
 
 		emmc: sdhc@68400000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v3.1";
 			status = "disabled";
 			reg = <0x68400000 0x800>;
 			interrupts = <0 78 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_emmc>;
 			clocks = <&sd_clk 1>;
-			reset-names = "host";
-			resets = <&sd_rst 1>;
+			reset-names = "host", "hw";
+			resets = <&sd_rst 1>, <&sd_rst 6>;
 			bus-width = <8>;
-			non-removable;
 			cap-mmc-highspeed;
 			cap-mmc-hw-reset;
-			no-3-3-v;
+			non-removable;
 		};
 
 		sd: sdhc@68800000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v3.1";
 			status = "disabled";
 			reg = <0x68800000 0x800>;
 			interrupts = <0 76 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default", "uhs";
 			pinctrl-0 = <&pinctrl_sd>;
-			pinctrl-1 = <&pinctrl_sd_1v8>;
+			pinctrl-1 = <&pinctrl_sd_uhs>;
 			clocks = <&sd_clk 0>;
 			reset-names = "host";
 			resets = <&sd_rst 0>;
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index f4101c0aa0..63c1c2ce60 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -36,6 +36,7 @@
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 			operating-points-v2 = <&cpu_opp>;
+			#cooling-cells = <2>;
 		};
 
 		cpu2: cpu@2 {
@@ -46,6 +47,7 @@
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 			operating-points-v2 = <&cpu_opp>;
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@3 {
@@ -56,6 +58,7 @@
 			enable-method = "psci";
 			next-level-cache = <&l2>;
 			operating-points-v2 = <&cpu_opp>;
+			#cooling-cells = <2>;
 		};
 	};
 
@@ -420,30 +423,29 @@
 		};
 
 		emmc: sdhc@5a000000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a000000 0x800>;
 			interrupts = <0 78 4>;
 			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_emmc>;
 			clocks = <&sd_clk 1>;
-			reset-names = "host";
-			resets = <&sd_rst 1>;
+			reset-names = "host", "hw";
+			resets = <&sd_rst 1>, <&sd_rst 6>;
 			bus-width = <8>;
-			non-removable;
 			cap-mmc-highspeed;
 			cap-mmc-hw-reset;
-			no-3-3-v;
+			non-removable;
 		};
 
 		sd: sdhc@5a400000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a400000 0x800>;
 			interrupts = <0 76 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default", "uhs";
 			pinctrl-0 = <&pinctrl_sd>;
-			pinctrl-1 = <&pinctrl_sd_1v8>;
+			pinctrl-1 = <&pinctrl_sd_uhs>;
 			clocks = <&sd_clk 0>;
 			reset-names = "host";
 			resets = <&sd_rst 0>;
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index cfeeecdad0..daf74531e4 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -327,7 +327,7 @@
 			reg = <0x5a000000 0x400>;
 			interrupts = <0 78 4>;
 			pinctrl-names = "default";
-			pinctrl-0 = <&pinctrl_emmc_1v8>;
+			pinctrl-0 = <&pinctrl_emmc>;
 			clocks = <&sys_clk 4>;
 			resets = <&sys_rst 4>;
 			bus-width = <8>;
@@ -342,17 +342,21 @@
 		};
 
 		sd: sdhc@5a400000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v3.1.1";
 			status = "disabled";
 			reg = <0x5a400000 0x800>;
 			interrupts = <0 76 4>;
-			pinctrl-names = "default";
+			pinctrl-names = "default", "uhs";
 			pinctrl-0 = <&pinctrl_sd>;
+			pinctrl-1 = <&pinctrl_sd_uhs>;
 			clocks = <&sd_clk 0>;
 			reset-names = "host";
 			resets = <&sd_rst 0>;
 			bus-width = <4>;
 			cap-sd-highspeed;
+			sd-uhs-sdr12;
+			sd-uhs-sdr25;
+			sd-uhs-sdr50;
 		};
 
 		soc_glue: soc-glue@5f800000 {
diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi
index f20926e4a9..437265bb73 100644
--- a/arch/arm/dts/uniphier-sld8.dtsi
+++ b/arch/arm/dts/uniphier-sld8.dtsi
@@ -229,13 +229,13 @@
 		};
 
 		sd: sdhc@5a400000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a400000 0x200>;
 			interrupts = <0 76 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default", "uhs";
 			pinctrl-0 = <&pinctrl_sd>;
-			pinctrl-1 = <&pinctrl_sd_1v8>;
+			pinctrl-1 = <&pinctrl_sd_uhs>;
 			clocks = <&mio_clk 0>;
 			reset-names = "host", "bridge";
 			resets = <&mio_rst 0>, <&mio_rst 3>;
@@ -247,20 +247,19 @@
 		};
 
 		emmc: sdhc@5a500000 {
-			compatible = "socionext,uniphier-sdhc";
+			compatible = "socionext,uniphier-sd-v2.91";
 			status = "disabled";
 			reg = <0x5a500000 0x200>;
 			interrupts = <0 78 4>;
-			pinctrl-names = "default", "1.8v";
+			pinctrl-names = "default";
 			pinctrl-0 = <&pinctrl_emmc>;
-			pinctrl-1 = <&pinctrl_emmc_1v8>;
 			clocks = <&mio_clk 1>;
-			reset-names = "host", "bridge";
-			resets = <&mio_rst 1>, <&mio_rst 4>;
+			reset-names = "host", "bridge", "hw";
+			resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
 			bus-width = <8>;
-			non-removable;
 			cap-mmc-highspeed;
 			cap-mmc-hw-reset;
+			non-removable;
 		};
 
 		usb0: usb@5a800100 {
diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c
index ec5fa7bc8a..e997acf1b7 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld11.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld11.c
@@ -34,14 +34,8 @@ void uniphier_ld11_clk_init(void)
 
 #ifdef CONFIG_USB_EHCI_HCD
 	{
-		/* FIXME: the current clk driver can not handle parents */
-		u32 tmp;
 		int ch;
 
-		tmp = readl(SC_CLKCTRL4);
-		tmp |= BIT(10) | BIT(8);	/* MIO, STDMAC */
-		writel(tmp, SC_CLKCTRL4);
-
 		for (ch = 0; ch < 3; ch++) {
 			void __iomem *phyctrl = (void __iomem *)SG_USBPHYCTRL;
 
diff --git a/arch/arm/mach-uniphier/clk/clk-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c
index d90fef07e6..9c88cde5e2 100644
--- a/arch/arm/mach-uniphier/clk/clk-ld4.c
+++ b/arch/arm/mach-uniphier/clk/clk-ld4.c
@@ -24,9 +24,6 @@ void uniphier_ld4_clk_init(void)
 
 	/* provide clocks */
 	tmp = readl(SC_CLKCTRL);
-#ifdef CONFIG_USB_EHCI_HCD
-	tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
-#endif
 #ifdef CONFIG_NAND_DENALI
 	tmp |= SC_CLKCTRL_CEN_NAND;
 #endif
diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c
index e73bf38924..32d44c0b66 100644
--- a/arch/arm/mach-uniphier/clk/clk-pro4.c
+++ b/arch/arm/mach-uniphier/clk/clk-pro4.c
@@ -39,9 +39,6 @@ void uniphier_pro4_clk_init(void)
 	tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
 		SC_CLKCTRL_CEN_GIO;
 #endif
-#ifdef CONFIG_USB_EHCI_HCD
-	tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
-#endif
 #ifdef CONFIG_NAND_DENALI
 	tmp |= SC_CLKCTRL_CEN_NAND;
 #endif
diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h
index c5c054e181..b105335f69 100644
--- a/arch/arm/mach-uniphier/sc-regs.h
+++ b/arch/arm/mach-uniphier/sc-regs.h
@@ -42,7 +42,6 @@
 #define SC_RSTCTRL_NRST_USB3B0		(0x1 << 17)	/* USB3 #0 bus */
 #define SC_RSTCTRL_NRST_USB3C0		(0x1 << 16)	/* USB3 #0 core */
 #define SC_RSTCTRL_NRST_ETHER		(0x1 << 12)
-#define SC_RSTCTRL_NRST_STDMAC		(0x1 << 10)
 #define SC_RSTCTRL_NRST_GIO		(0x1 <<  6)
 /* Pro4 or older */
 #define SC_RSTCTRL_NRST_UMC1		(0x1 <<  5)
@@ -73,8 +72,6 @@
 #define SC_CLKCTRL_CEN_USB31		(0x1 << 17)	/* USB3 #1 */
 #define SC_CLKCTRL_CEN_USB30		(0x1 << 16)	/* USB3 #0 */
 #define SC_CLKCTRL_CEN_ETHER		(0x1 << 12)
-#define SC_CLKCTRL_CEN_MIO		(0x1 << 11)
-#define SC_CLKCTRL_CEN_STDMAC		(0x1 << 10)
 #define SC_CLKCTRL_CEN_GIO		(0x1 <<  6)
 /* Pro4 or older */
 #define SC_CLKCTRL_CEN_UMC		(0x1 <<  4)