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| author | Tom Rini <trini@konsulko.com> | 2016-11-30 09:57:52 -0500 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-11-30 09:57:52 -0500 |
| commit | 4d6647ab17ab9d33c60f7a9f07576c5fbdf6336f (patch) | |
| tree | e3bde11276fcf8ce1c02d797a71fa23d974c66f3 /board/freescale | |
| parent | 6b29a395b62965eef6b5065d3a526a8588a92038 (diff) | |
| parent | 4db4d42ee290a8cad00b358b2e7ef6a00483893b (diff) | |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mx7dsabresd/mx7dsabresd.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/board/freescale/mx7dsabresd/mx7dsabresd.c b/board/freescale/mx7dsabresd/mx7dsabresd.c index b9365445e8..6ccdd4b33b 100644 --- a/board/freescale/mx7dsabresd/mx7dsabresd.c +++ b/board/freescale/mx7dsabresd/mx7dsabresd.c @@ -50,6 +50,9 @@ DECLARE_GLOBAL_DATA_PTR; #define NAND_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_SLOW | PAD_CTL_HYS) +#define SPI_PAD_CTRL \ + (PAD_CTL_HYS | PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_SRE_FAST) + #define NAND_PAD_READY0_CTRL (PAD_CTL_DSE_3P3V_49OHM | PAD_CTL_PUS_PU5KOHM) #ifdef CONFIG_SYS_I2C_MXC #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) @@ -68,6 +71,23 @@ static struct i2c_pads_info i2c_pad_info1 = { }; #endif +static iomux_v3_cfg_t const ecspi3_pads[] = { + MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 2 && cs == 0) ? (IMX_GPIO_NR(6, 22)) : -1; +} + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi3_pads, ARRAY_SIZE(ecspi3_pads)); +} + int dram_init(void) { gd->ram_size = PHYS_SDRAM_SIZE; @@ -553,6 +573,10 @@ int board_init(void) board_qspi_init(); #endif +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + return 0; } |