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authorTom Rix <Tom.Rix@windriver.com>2009-10-04 05:40:07 -0500
committerTom Rix <Tom.Rix@windriver.com>2009-10-04 05:40:07 -0500
commit4d6c2dd7ed6c6bc4114ca5c7577560ea9ba50bd0 (patch)
tree676e49c06682ea211d2d909beb35cee5623d106e /board/jse/jse.c
parent300d1137161a47573b0f6504f32371c8065b8d37 (diff)
parent1d96cfe8f5eebfc6ea39d1a387f35ca4499e6b67 (diff)
Merge branch 'arm/master' into arm/next
Conflicts: board/AtmarkTechno/suzaku/Makefile board/amcc/acadia/acadia.c board/amcc/katmai/katmai.c board/amcc/luan/luan.c board/amcc/ocotea/ocotea.c board/cm-bf537u/Makefile board/cray/L1/L1.c board/csb272/csb272.c board/csb472/csb472.c board/eric/eric.c board/eric/init.S board/eukrea/cpuat91/Makefile board/exbitgen/exbitgen.c board/exbitgen/init.S board/freescale/mpc8536ds/config.mk board/g2000/g2000.c board/jse/sdram.c board/mpl/mip405/mip405.c board/mpl/pip405/pip405.c board/netstal/hcu5/hcu5.c board/netstal/mcu25/mcu25.c board/sc3/sc3.c board/w7o/init.S board/w7o/w7o.c common/cmd_reginfo.c cpu/ppc4xx/40x_spd_sdram.c cpu/ppc4xx/44x_spd_ddr.c doc/README.sbc8548 drivers/misc/fsl_law.c fs/ubifs/ubifs.c include/asm-ppc/immap_85xx.h Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Diffstat (limited to 'board/jse/jse.c')
-rw-r--r--board/jse/jse.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/board/jse/jse.c b/board/jse/jse.c
index 6dc9a01af8..1849ca47d7 100644
--- a/board/jse/jse.c
+++ b/board/jse/jse.c
@@ -48,12 +48,12 @@ int board_early_init_f (void)
| IRQ 30 (EXT IRQ 5) SystemACE BRdy (unused)
| IRQ 31 (EXT IRQ 6) (unused)
+-------------------------------------------------------------------------*/
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr (uicer, 0x00000000); /* disable all ints */
- mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
- mtdcr (uicpr, 0xFFFFFF87); /* set int polarities */
- mtdcr (uictr, 0x10000000); /* set int trigger levels */
- mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (UIC0ER, 0x00000000); /* disable all ints */
+ mtdcr (UIC0CR, 0x00000000); /* set all to be non-critical */
+ mtdcr (UIC0PR, 0xFFFFFF87); /* set int polarities */
+ mtdcr (UIC0TR, 0x10000000); /* set int trigger levels */
+ mtdcr (UIC0SR, 0xFFFFFFFF); /* clear all ints */
/* Configure the interface to the SystemACE MCU port.
The SystemACE is fast, but there is no reason to have