diff options
author | Holger Brunck <holger.brunck@ch.abb.com> | 2020-01-10 12:47:42 +0100 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-01-23 07:29:58 -0500 |
commit | 78a408bb49a78462b1cdff0611029d8f830c5e5e (patch) | |
tree | 8de76cc650e0d293c22f6cd6a505407b096bced3 /board/keymile/kmp204x | |
parent | ac32e7d109112f848b3f0dc68cff48021e348e86 (diff) |
KM/kmp204x: qrio and i2c deblock code moved to common
This patch moves the qrio and i2c deblocking code to
keymile/common as it will also be used by the upcoming CENT2 board.
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
CC: Priyanka Jain <priyanka.jain@nxp.com>
Diffstat (limited to 'board/keymile/kmp204x')
-rw-r--r-- | board/keymile/kmp204x/Makefile | 4 | ||||
-rw-r--r-- | board/keymile/kmp204x/kmp204x.c | 48 | ||||
-rw-r--r-- | board/keymile/kmp204x/kmp204x.h | 26 | ||||
-rw-r--r-- | board/keymile/kmp204x/pci.c | 15 | ||||
-rw-r--r-- | board/keymile/kmp204x/qrio.c | 206 |
5 files changed, 12 insertions, 287 deletions
diff --git a/board/keymile/kmp204x/Makefile b/board/keymile/kmp204x/Makefile index 626c627be7..5523ee99aa 100644 --- a/board/keymile/kmp204x/Makefile +++ b/board/keymile/kmp204x/Makefile @@ -6,5 +6,5 @@ # See file CREDITS for list of people who contributed to this # project. -obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o qrio.o \ - ../common/common.o ../common/ivm.o +obj-y := kmp204x.o ddr.o eth.o tlb.o pci.o law.o ../common/common.o\ + ../common/ivm.o ../common/qrio.o diff --git a/board/keymile/kmp204x/kmp204x.c b/board/keymile/kmp204x/kmp204x.c index c93fa3c62e..0a6cf1fd29 100644 --- a/board/keymile/kmp204x/kmp204x.c +++ b/board/keymile/kmp204x/kmp204x.c @@ -24,6 +24,7 @@ #include <fm_eth.h> #include "../common/common.h" +#include "../common/qrio.h" #include "kmp204x.h" static uchar ivm_content[CONFIG_SYS_IVM_EEPROM_MAX_LEN]; @@ -35,51 +36,6 @@ int checkboard(void) return 0; } -/* I2C deblocking uses the algorithm defined in board/keymile/common/common.c - * 2 dedicated QRIO GPIOs externally pull the SCL and SDA lines - * For I2C only the low state is activly driven and high state is pulled-up - * by a resistor. Therefore the deblock GPIOs are used - * -> as an active output to drive a low state - * -> as an open-drain input to have a pulled-up high state - */ - -/* QRIO GPIOs used for deblocking */ -#define DEBLOCK_PORT1 GPIO_A -#define DEBLOCK_SCL1 20 -#define DEBLOCK_SDA1 21 - -/* By default deblock GPIOs are floating */ -static void i2c_deblock_gpio_cfg(void) -{ - /* set I2C bus 1 deblocking GPIOs input, but 0 value for open drain */ - qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SCL1); - qrio_gpio_direction_input(DEBLOCK_PORT1, DEBLOCK_SDA1); - - qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, 0); - qrio_set_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, 0); -} - -void set_sda(int state) -{ - qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1, state); -} - -void set_scl(int state) -{ - qrio_set_opendrain_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1, state); -} - -int get_sda(void) -{ - return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SDA1); -} - -int get_scl(void) -{ - return qrio_get_gpio(DEBLOCK_PORT1, DEBLOCK_SCL1); -} - - #define ZL30158_RST 8 #define BFTIC4_RST 0 #define RSTRQSR1_WDT_RR 0x00200000 @@ -297,7 +253,7 @@ int ft_board_setup(void *blob, bd_t *bd) #if defined(CONFIG_POST) /* DIC26_SELFTEST GPIO used to start factory test sw */ -#define SELFTEST_PORT GPIO_A +#define SELFTEST_PORT QRIO_GPIO_A #define SELFTEST_PIN 31 int post_hotkeys_pressed(void) diff --git a/board/keymile/kmp204x/kmp204x.h b/board/keymile/kmp204x/kmp204x.h index 4d14c44617..00e1a06662 100644 --- a/board/keymile/kmp204x/kmp204x.h +++ b/board/keymile/kmp204x/kmp204x.h @@ -4,31 +4,5 @@ * Valentin Longchamp <valentin.longchamp@keymile.com> */ -/* QRIO GPIO ports */ -#define GPIO_A 0x40 -#define GPIO_B 0x60 - -int qrio_get_gpio(u8 port_off, u8 gpio_nr); -void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val); -void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value); -void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value); -void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr); - -#define PRSTCFG_POWUP_UNIT_CORE_RST 0x0 -#define PRSTCFG_POWUP_UNIT_RST 0x1 -#define PRSTCFG_POWUP_RST 0x3 - -void qrio_prst(u8 bit, bool en, bool wden); -void qrio_wdmask(u8 bit, bool wden); -void qrio_prstcfg(u8 bit, u8 mode); -void qrio_set_leds(void); -void qrio_enable_app_buffer(void); -void qrio_cpuwd_flag(bool flag); -int qrio_reset_reason(void); - -#define UPREQ_UNIT_RST 0x0 -#define UPREQ_CORE_RST 0x1 - -void qrio_uprstreq(u8 mode); void pci_of_setup(void *blob, bd_t *bd); diff --git a/board/keymile/kmp204x/pci.c b/board/keymile/kmp204x/pci.c index a8047457f2..15bbc810a1 100644 --- a/board/keymile/kmp204x/pci.c +++ b/board/keymile/kmp204x/pci.c @@ -16,13 +16,14 @@ #include <asm/fsl_serdes.h> #include <linux/errno.h> +#include "../common/qrio.h" #include "kmp204x.h" #define PROM_SEL_L 11 /* control the PROM_SEL_L signal*/ static void toggle_fpga_eeprom_bus(bool cpu_own) { - qrio_gpio_direction_output(GPIO_A, PROM_SEL_L, !cpu_own); + qrio_gpio_direction_output(QRIO_GPIO_A, PROM_SEL_L, !cpu_own); } #define CONF_SEL_L 10 @@ -40,17 +41,17 @@ int trigger_fpga_config(void) toggle_fpga_eeprom_bus(false); /* assert CONF_SEL_L to be able to drive FPGA_PROG_L */ - qrio_gpio_direction_output(GPIO_A, CONF_SEL_L, 0); + qrio_gpio_direction_output(QRIO_GPIO_A, CONF_SEL_L, 0); /* trigger the config start */ - qrio_gpio_direction_output(GPIO_A, FPGA_PROG_L, 0); + qrio_gpio_direction_output(QRIO_GPIO_A, FPGA_PROG_L, 0); /* small delay for INIT_L line */ udelay(10); /* wait for FPGA_INIT to be asserted */ do { - init_l = qrio_get_gpio(GPIO_A, FPGA_INIT_L); + init_l = qrio_get_gpio(QRIO_GPIO_A, FPGA_INIT_L); if (timeout-- == 0) { printf("FPGA_INIT timeout\n"); ret = -EFAULT; @@ -60,7 +61,7 @@ int trigger_fpga_config(void) } while (init_l); /* deassert FPGA_PROG, config should start */ - qrio_set_gpio(GPIO_A, FPGA_PROG_L, 1); + qrio_set_gpio(QRIO_GPIO_A, FPGA_PROG_L, 1); return ret; } @@ -74,7 +75,7 @@ static int wait_for_fpga_config(void) printf("PCIe FPGA config:"); do { - done = qrio_get_gpio(GPIO_A, FPGA_DONE); + done = qrio_get_gpio(QRIO_GPIO_A, FPGA_DONE); if (timeout-- == 0) { printf(" FPGA_DONE timeout\n"); ret = -EFAULT; @@ -87,7 +88,7 @@ static int wait_for_fpga_config(void) err_out: /* deactive CONF_SEL and give the CPU conf EEPROM access */ - qrio_set_gpio(GPIO_A, CONF_SEL_L, 1); + qrio_set_gpio(QRIO_GPIO_A, CONF_SEL_L, 1); toggle_fpga_eeprom_bus(true); return ret; diff --git a/board/keymile/kmp204x/qrio.c b/board/keymile/kmp204x/qrio.c deleted file mode 100644 index 03026a277b..0000000000 --- a/board/keymile/kmp204x/qrio.c +++ /dev/null @@ -1,206 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2013 Keymile AG - * Valentin Longchamp <valentin.longchamp@keymile.com> - */ - -#include <common.h> - -#include "../common/common.h" -#include "kmp204x.h" - -/* QRIO GPIO register offsets */ -#define DIRECT_OFF 0x18 -#define GPRT_OFF 0x1c - -int qrio_get_gpio(u8 port_off, u8 gpio_nr) -{ - u32 gprt; - - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - gprt = in_be32(qrio_base + port_off + GPRT_OFF); - - return (gprt >> gpio_nr) & 1U; -} - -void qrio_set_gpio(u8 port_off, u8 gpio_nr, bool value) -{ - u32 gprt, mask; - - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - mask = 1U << gpio_nr; - - gprt = in_be32(qrio_base + port_off + GPRT_OFF); - if (value) - gprt |= mask; - else - gprt &= ~mask; - - out_be32(qrio_base + port_off + GPRT_OFF, gprt); -} - -void qrio_gpio_direction_output(u8 port_off, u8 gpio_nr, bool value) -{ - u32 direct, mask; - - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - mask = 1U << gpio_nr; - - direct = in_be32(qrio_base + port_off + DIRECT_OFF); - direct |= mask; - out_be32(qrio_base + port_off + DIRECT_OFF, direct); - - qrio_set_gpio(port_off, gpio_nr, value); -} - -void qrio_gpio_direction_input(u8 port_off, u8 gpio_nr) -{ - u32 direct, mask; - - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - mask = 1U << gpio_nr; - - direct = in_be32(qrio_base + port_off + DIRECT_OFF); - direct &= ~mask; - out_be32(qrio_base + port_off + DIRECT_OFF, direct); -} - -void qrio_set_opendrain_gpio(u8 port_off, u8 gpio_nr, u8 val) -{ - u32 direct, mask; - - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - mask = 1U << gpio_nr; - - direct = in_be32(qrio_base + port_off + DIRECT_OFF); - if (val == 0) - /* set to output -> GPIO drives low */ - direct |= mask; - else - /* set to input -> GPIO floating */ - direct &= ~mask; - - out_be32(qrio_base + port_off + DIRECT_OFF, direct); -} - -#define WDMASK_OFF 0x16 - -void qrio_wdmask(u8 bit, bool wden) -{ - u16 wdmask; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - wdmask = in_be16(qrio_base + WDMASK_OFF); - - if (wden) - wdmask |= (1 << bit); - else - wdmask &= ~(1 << bit); - - out_be16(qrio_base + WDMASK_OFF, wdmask); -} - -#define PRST_OFF 0x1a - -void qrio_prst(u8 bit, bool en, bool wden) -{ - u16 prst; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - qrio_wdmask(bit, wden); - - prst = in_be16(qrio_base + PRST_OFF); - - if (en) - prst &= ~(1 << bit); - else - prst |= (1 << bit); - - out_be16(qrio_base + PRST_OFF, prst); -} - -#define PRSTCFG_OFF 0x1c - -void qrio_prstcfg(u8 bit, u8 mode) -{ - u32 prstcfg; - u8 i; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - prstcfg = in_be32(qrio_base + PRSTCFG_OFF); - - for (i = 0; i < 2; i++) { - if (mode & (1<<i)) - set_bit(2*bit+i, &prstcfg); - else - clear_bit(2*bit+i, &prstcfg); - } - - out_be32(qrio_base + PRSTCFG_OFF, prstcfg); -} - -#define CTRLH_OFF 0x02 -#define CTRLH_WRL_BOOT 0x01 -#define CTRLH_WRL_UNITRUN 0x02 - -void qrio_set_leds(void) -{ - u8 ctrlh; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - /* set UNIT LED to RED and BOOT LED to ON */ - ctrlh = in_8(qrio_base + CTRLH_OFF); - ctrlh |= (CTRLH_WRL_BOOT | CTRLH_WRL_UNITRUN); - out_8(qrio_base + CTRLH_OFF, ctrlh); -} - -#define CTRLL_OFF 0x03 -#define CTRLL_WRB_BUFENA 0x20 - -void qrio_enable_app_buffer(void) -{ - u8 ctrll; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - /* enable application buffer */ - ctrll = in_8(qrio_base + CTRLL_OFF); - ctrll |= (CTRLL_WRB_BUFENA); - out_8(qrio_base + CTRLL_OFF, ctrll); -} - -#define REASON1_OFF 0x12 -#define REASON1_CPUWD 0x01 - -void qrio_cpuwd_flag(bool flag) -{ - u8 reason1; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - reason1 = in_8(qrio_base + REASON1_OFF); - if (flag) - reason1 |= REASON1_CPUWD; - else - reason1 &= ~REASON1_CPUWD; - out_8(qrio_base + REASON1_OFF, reason1); -} - -#define RSTCFG_OFF 0x11 - -void qrio_uprstreq(u8 mode) -{ - u32 rstcfg; - void __iomem *qrio_base = (void *)CONFIG_SYS_QRIO_BASE; - - rstcfg = in_8(qrio_base + RSTCFG_OFF); - - if (mode & UPREQ_CORE_RST) - rstcfg |= UPREQ_CORE_RST; - else - rstcfg &= ~UPREQ_CORE_RST; - - out_8(qrio_base + RSTCFG_OFF, rstcfg); -} |