diff options
author | Wolfgang Denk <wd@denx.de> | 2011-11-23 21:23:45 +0100 |
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committer | Wolfgang Denk <wd@denx.de> | 2011-11-23 21:23:45 +0100 |
commit | fdbe8b9a2d1858ba35dd6214315563ad44d4a0e3 (patch) | |
tree | 98c39a0594ef02e08d5842cfff1f1d6bcc5a8eda /board/mx1ads/syncflash.c | |
parent | bd0f5ca806c73f9e1ef4a2a0416233ab7e257df9 (diff) | |
parent | d780e74fc3abe6a8b9a01357720c15d974d83dae (diff) |
Merge branch 'hs@denx.de' of git://git.denx.de/u-boot-staging
* 'hs@denx.de' of git://git.denx.de/u-boot-staging:
drivers/net/dnet.c: Fix GCC 4.6 warnings
board/xaeniax/flash.c: Fix GCC 4.6 warnings
net/bootp.c: Fix GCC 4.6 warning
common/cmd_bootm.c: Fix GCC 4.6 warnings
board/mx1ads/mx1ads.c: Fix GCC 4.6 warning
board/mx1ads/syncflash.c: Fix GCC 4.6 warnings
board/lubbock/flash.c: Fix GCC 4.6 warnings
drivers/net/cs8900.c: Fix GCC 4.6 warning
arch/arm/cpu/arm926ejs/omap/cpuinfo.c: Fix GCC 4.6 warnings
drivers/net/lan91c96.c: Fix GCC 4.6 warning
board/ronetix/pm9263/pm9263.c: Fix GCC 4.6 warning
drivers/mtd/onenand/samsung.c: Fix GCC 4.6 warning
drivers/usb/musb/musb_hcd.c: Fix GCC 4.6 warning
Diffstat (limited to 'board/mx1ads/syncflash.c')
-rw-r--r-- | board/mx1ads/syncflash.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/board/mx1ads/syncflash.c b/board/mx1ads/syncflash.c index 7331efa956..61a882e00b 100644 --- a/board/mx1ads/syncflash.c +++ b/board/mx1ads/syncflash.c @@ -57,7 +57,7 @@ flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips /* Get Status register */ u32 SF_SR(void) { - u32 tmp,tmp1; + u32 tmp; reg_SFCTL = CMD_PROGRAM; tmp = __REG(CONFIG_SYS_FLASH_BASE); @@ -65,7 +65,7 @@ u32 SF_SR(void) { reg_SFCTL = CMD_NORMAL; reg_SFCTL = CMD_LCR; /* Activate LCR Mode */ - tmp1 = __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR); + __REG(CONFIG_SYS_FLASH_BASE + LCR_SR_CLEAR); return tmp; } @@ -93,10 +93,10 @@ u8 SF_Ready(void) { /* Issue the precharge all command */ void SF_PrechargeAll(void) { - u32 tmp; - - reg_SFCTL = CMD_PREC; /* Set Precharge Command */ - tmp = __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); /* Issue Precharge All Command */ + /* Set Precharge Command */ + reg_SFCTL = CMD_PREC; + /* Issue Precharge All Command */ + __REG(CONFIG_SYS_FLASH_BASE + SYNCFLASH_A10); } /* set SyncFlash to normal mode */ @@ -109,13 +109,12 @@ void SF_Normal(void) { /* Erase SyncFlash */ void SF_Erase(u32 RowAddress) { - u32 tmp; reg_SFCTL = CMD_NORMAL; - tmp = __REG(RowAddress); + __REG(RowAddress); reg_SFCTL = CMD_PREC; - tmp = __REG(RowAddress); + __REG(RowAddress); reg_SFCTL = CMD_LCR; /* Set LCR mode */ __REG(RowAddress + LCR_ERASE_CONFIRM) = 0; /* Issue Erase Setup Command */ @@ -152,7 +151,6 @@ void SF_NvmodeWrite(void) { ulong flash_init(void) { int i, j; - u32 tmp; /* Turn on CSD1 for negating RESETSF of SyncFLash */ @@ -160,7 +158,7 @@ ulong flash_init(void) { udelay(200); reg_SFCTL = CMD_LMR; /* Set Load Mode Register Command */ - tmp = __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */ + __REG(MODE_REG_VAL); /* Issue Load Mode Register Command */ SF_Normal(); |