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authorStefan Roese <sr@denx.de>2008-06-03 20:19:08 +0200
committerStefan Roese <sr@denx.de>2008-06-03 20:19:08 +0200
commit10a3367955bc2033b288915f8f10d0e507fe2fa1 (patch)
treec3ac82364df83db5d5cb963c64b863b77a20445c /board/omap5912osk/lowlevel_init.S
parent97f7d27c8ecf34879d6b747c10fa9a18c02a4cc0 (diff)
parent1f1554841a4c8e069d331176f0c3059fb2bb8280 (diff)
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'board/omap5912osk/lowlevel_init.S')
-rw-r--r--board/omap5912osk/lowlevel_init.S6
1 files changed, 3 insertions, 3 deletions
diff --git a/board/omap5912osk/lowlevel_init.S b/board/omap5912osk/lowlevel_init.S
index a1fa097d9e..7bfdb26325 100644
--- a/board/omap5912osk/lowlevel_init.S
+++ b/board/omap5912osk/lowlevel_init.S
@@ -125,7 +125,7 @@ lock_end:
/*------------------------------------------------------*
* Turn off the watchdog during init... *
- *------------------------------------------------------*/
+ *------------------------------------------------------*/
ldr r0, REG_WATCHDOG
ldr r1, WATCHDOG_VAL1
str r1, [r0]
@@ -191,7 +191,7 @@ skip_TMP_Patch:
mov r0, #0x1800 /* value should be checked */
3:
subs r0, r0, #0x1 /* Decrement count */
- bne 3b
+ bne 3b
/*
* Set SDRAM control values. Disable refresh before MRS command.
@@ -294,7 +294,7 @@ common_tc:
#ifdef CONFIG_H2_OMAP1610
/* inserting additional 2 clock cycle hold time for LAN */
ldr r0, REG_TC_EMIFS_CS1_ADVANCED
- ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
+ ldr r1, VAL_TC_EMIFS_CS1_ADVANCED
str r1, [r0]
#endif
/* Start MPU Timer 1 */