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authorIcenowy Zheng <icenowy@aosc.io>2017-07-20 14:00:31 +0800
committerJagan Teki <jagan@amarulasolutions.com>2017-08-11 15:49:39 +0530
commit39858b12cceed3894cc62d194f098396f4306c0c (patch)
tree2dc0166b2a3f27fd131cf19880be12db121bcb6d /board
parent8792a64d87708139bc0cf8b48d4a580a39167473 (diff)
sunxi: add PRCM secure switch register definition
Some new Allwinner SoCs' PRCM has a secure switch register, which controls the access to some clock and power registers in PRCM block. Add the definition of this register and its bits in the PRCM header file. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Tested-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
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