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authorYangbo Lu <yangbo.lu@nxp.com>2020-01-16 13:19:44 +0800
committerPeng Fan <peng.fan@nxp.com>2020-01-16 13:19:44 +0800
commit181c65b814b29a9e12f5fd034e259c891f3bbb64 (patch)
tree73fec4abcb3fea2b74a42cf6dad80c44235b23c9 /configs/ls1028ardb_tfa_defconfig
parentac76dd0836468445e1ba4d756617d677ed58f59b (diff)
configs: ls1028a: use default SDHC clock divider value
The SDHC clock divider value for LS1028A should be default 2, not 1. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'configs/ls1028ardb_tfa_defconfig')
-rw-r--r--configs/ls1028ardb_tfa_defconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 41fe40a853..6715d310fa 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -3,7 +3,6 @@ CONFIG_TARGET_LS1028ARDB=y
CONFIG_TFABOOT=y
CONFIG_SYS_MALLOC_F_LEN=0x6000
CONFIG_FSPI_AHB_EN_4BYTE=y
-CONFIG_SYS_FSL_SDHC_CLK_DIV=1
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
CONFIG_NR_DRAM_BANKS=2