diff options
| author | Lionel Debieve <lionel.debieve@st.com> | 2020-04-24 15:47:57 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2020-05-14 09:02:12 +0200 |
| commit | 36911fca63162d8309c2bc6443028b56a6411870 (patch) | |
| tree | c1d4fdc0c212b63fd404eadce061b07b2b255859 /drivers/clk/exynos | |
| parent | d7244e4a1fe72c9fbd63f74489099051887b2e89 (diff) | |
clk: stm32mp1: fix CK_MPU calculation
When the CK_MPU used PLL1_MPUDIV, the current rate is
wrong. The clock must use stm32mp1_mpu_div as a shift
value. Fix the check value used to enter PLL_MPUDIV.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Diffstat (limited to 'drivers/clk/exynos')
0 files changed, 0 insertions, 0 deletions