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| author | Bin Meng <bmeng.cn@gmail.com> | 2015-09-09 23:20:28 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-09-16 19:53:53 -0600 |
| commit | 5bf0f7f65d40447cec0f3d91abda59eb4a4f88af (patch) | |
| tree | da3aae3084ca4a484534ec3ca15edc98eaf62d1c /drivers/mmc/fsl_esdhc_spl.c | |
| parent | 554778c240385b09dc01140865fe3f5d04806456 (diff) | |
x86: galileo: Add PCIe root port IRQ routing
Now we have enabled PCIe root port on Quark SoC, add its PIRQ
routing information in the device tree as well.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/mmc/fsl_esdhc_spl.c')
0 files changed, 0 insertions, 0 deletions