diff options
author | Weijie Gao <weijie.gao@mediatek.com> | 2019-09-25 17:45:23 +0800 |
---|---|---|
committer | Daniel Schwierzeck <daniel.schwierzeck@gmail.com> | 2019-10-25 17:20:44 +0200 |
commit | f09978566b601a6377dfe56dd11da0df75ba9fd0 (patch) | |
tree | 8f5e7cec0a636d81da58e51c75c19793a9afb00b /drivers/spi | |
parent | 2d767a749725e485f62f7e97b7b309a903ac4e60 (diff) |
spi: mt7621-spi: use clock frequency from clk driver
This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Diffstat (limited to 'drivers/spi')
-rw-r--r-- | drivers/spi/mt7621_spi.c | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/drivers/spi/mt7621_spi.c b/drivers/spi/mt7621_spi.c index 107e58f657..b37f859b98 100644 --- a/drivers/spi/mt7621_spi.c +++ b/drivers/spi/mt7621_spi.c @@ -9,6 +9,7 @@ */ #include <common.h> +#include <clk.h> #include <dm.h> #include <spi.h> #include <wait_bit.h> @@ -266,19 +267,24 @@ static int mt7621_spi_xfer(struct udevice *dev, unsigned int bitlen, static int mt7621_spi_probe(struct udevice *dev) { struct mt7621_spi *rs = dev_get_priv(dev); + struct clk clk; + int ret; rs->base = dev_remap_addr(dev); if (!rs->base) return -EINVAL; - /* - * Read input clock via DT for now. At some point this should be - * replaced by implementing a clock driver for this SoC and getting - * the SPI frequency via this clock driver. - */ - rs->sys_freq = dev_read_u32_default(dev, "clock-frequency", 0); + ret = clk_get_by_index(dev, 0, &clk); + if (ret < 0) { + printf("Please provide a clock!\n"); + return ret; + } + + clk_enable(&clk); + + rs->sys_freq = clk_get_rate(&clk); if (!rs->sys_freq) { - printf("Please provide clock-frequency!\n"); + printf("Please provide a valid clock!\n"); return -EINVAL; } |