Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2019.04-rc2

xilinx:
- Start to use distro boot commands first
- Setup fdtfile on ZynqMP
- Move mac addr eeprom read to common location
- Convert to OF_SEPARATE
- Switch all board to DM_I2C
- Some DT syncs

i2c:
- Remove !DM_I2C zynq driver

versal:
- Enable some more features
- Add mini configurations

17 files changed, 166 insertions, 322 deletions

diff --git a/include/configs/syzygy_hub.h b/include/configs/syzygy_hub.h
index 88ee772848..e31b77c0c0 100644
--- a/include/configs/syzygy_hub.h
+++ b/include/configs/syzygy_hub.h
@@ -10,9 +10,6 @@
 #ifndef __CONFIG_SYZYGY_HUB_H
 #define __CONFIG_SYZYGY_HUB_H
 
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_ZYNQ_GEM_EEPROM_ADDR    0x57
-
 #define CONFIG_EXTRA_ENV_SETTINGS       \
 	"fit_image=fit.itb\0"		\
 	"bitstream_image=download.bit\0"    \
diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h
index bfe4c43449..2cc36e793b 100644
--- a/include/configs/xilinx_versal.h
+++ b/include/configs/xilinx_versal.h
@@ -73,9 +73,33 @@
 	"pxefile_addr_r=0x10000000\0" \
 	"kernel_addr_r=0x18000000\0" \
 	"scriptaddr=0x02000000\0" \
-	"ramdisk_addr_r=0x02100000\0"
+	"ramdisk_addr_r=0x02100000\0" \
+	"script_offset_f=0x3f80000\0" \
+	"script_size_f=0x80000\0"
+
+#if defined(CONFIG_MMC_SDHCI_ZYNQ)
+# define BOOT_TARGET_DEVICES_MMC(func)	func(MMC, mmc, 0) func(MMC, mmc, 1)
+#else
+# define BOOT_TARGET_DEVICES_MMC(func)
+#endif
+
+#if defined(CONFIG_ZYNQMP_GQSPI) || defined(CONFIG_CADENCE_OSPI_VERSAL)
+# define BOOT_TARGET_DEVICES_XSPI(func)	func(XSPI, xspi, 0)
+#else
+# define BOOT_TARGET_DEVICES_XSPI(func)
+#endif
+
+#define BOOTENV_DEV_XSPI(devtypeu, devtypel, instance) \
+	"bootcmd_xspi0=sf probe 0 0 0 && " \
+	"sf read $scriptaddr $script_offset_f $script_size_f && " \
+	"source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_XSPI(devtypeu, devtypel, instance) \
+	"xspi "
 
 #define BOOT_TARGET_DEVICES(func) \
+	BOOT_TARGET_DEVICES_MMC(func) \
+	BOOT_TARGET_DEVICES_XSPI(func) \
 	func(PXE, pxe, na) \
 	func(DHCP, dhcp, na)
 
diff --git a/include/configs/xilinx_versal_mini.h b/include/configs/xilinx_versal_mini.h
new file mode 100644
index 0000000000..c15fb5fc3b
--- /dev/null
+++ b/include/configs/xilinx_versal_mini.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for Xilinx Versal MINI configuration
+ *
+ * (C) Copyright 2018-2019 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
+ */
+
+#ifndef __CONFIG_VERSAL_MINI_H
+#define __CONFIG_VERSAL_MINI_H
+
+/* #define CONFIG_SYS_DCACHE_OFF */
+#define CONFIG_SYS_ICACHE_OFF
+
+#define CONFIG_SYS_MEMTEST_SCRATCH     0xfffc0000
+
+#define CONFIG_EXTRA_ENV_SETTINGS
+
+#include <configs/xilinx_versal.h>
+
+/* Undef unneeded configs */
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#undef CONFIG_ZLIB
+#undef CONFIG_GZIP
+#undef CONFIG_CMD_ENV
+#undef CONFIG_BOOTM_NETBSD
+#undef CONFIG_BOOTM_VXWORKS
+#undef CONFIG_BOOTM_LINUX
+
+/* BOOTP options */
+#undef CONFIG_BOOTP_BOOTFILESIZE
+#undef CONFIG_BOOTP_MAY_FAIL
+
+#endif /* __CONFIG_VERSAL_MINI_H */
diff --git a/include/configs/xilinx_versal_mini_qspi.h b/include/configs/xilinx_versal_mini_qspi.h
new file mode 100644
index 0000000000..8572b8b3d2
--- /dev/null
+++ b/include/configs/xilinx_versal_mini_qspi.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for Xilinx Versal QSPI Flash utility
+ *
+ * (C) Copyright 2018-2019 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ * Siva Durga Prasad Paladugu <sivadur@xilinx.com>
+ */
+
+#ifndef __CONFIG_VERSAL_MINI_QSPI_H
+#define __CONFIG_VERSAL_MINI_QSPI_H
+
+#include <configs/xilinx_versal_mini.h>
+
+#undef CONFIG_SYS_INIT_SP_ADDR
+#define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_TEXT_BASE + 0x20000)
+
+#endif /* __CONFIG_VERSAL_MINI_QSPI_H */
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 7a9b06ec4c..27a8e4d490 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -108,11 +108,6 @@
 # define PHY_ANEG_TIMEOUT       20000
 #endif
 
-/* I2C */
-#if defined(CONFIG_SYS_I2C_ZYNQ)
-# define CONFIG_SYS_I2C
-#endif
-
 /* EEPROM */
 #ifdef CONFIG_ZYNQMP_EEPROM
 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		2
@@ -134,6 +129,8 @@
 	"kernel_addr_r=0x18000000\0" \
 	"scriptaddr=0x02000000\0" \
 	"ramdisk_addr_r=0x02100000\0" \
+	"script_offset_f=0x3e80000\0" \
+	"script_size_f=0x80000\0" \
 
 #if defined(CONFIG_MMC_SDHCI_ZYNQ)
 # define BOOT_TARGET_DEVICES_MMC(func)	func(MMC, mmc, 0) func(MMC, mmc, 1)
@@ -165,8 +162,38 @@
 # define BOOT_TARGET_DEVICES_DHCP(func)
 #endif
 
+#if defined(CONFIG_ZYNQMP_GQSPI)
+# define BOOT_TARGET_DEVICES_QSPI(func)	func(QSPI, qspi, 0)
+#else
+# define BOOT_TARGET_DEVICES_QSPI(func)
+#endif
+
+#if defined(CONFIG_NAND_ARASAN)
+# define BOOT_TARGET_DEVICES_NAND(func)	func(NAND, nand, 0)
+#else
+# define BOOT_TARGET_DEVICES_NAND(func)
+#endif
+
+#define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
+	"bootcmd_" #devtypel #instance "=sf probe " #instance " 0 0 && " \
+		       "sf read $scriptaddr $script_offset_f $script_size_f && " \
+		       "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
+	#devtypel #instance " "
+
+#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
+	"bootcmd_" #devtypel #instance "= nand info && " \
+		       "nand read $scriptaddr $script_offset_f $script_size_f && " \
+		       "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
+	#devtypel #instance " "
+
 #define BOOT_TARGET_DEVICES(func) \
 	BOOT_TARGET_DEVICES_MMC(func) \
+	BOOT_TARGET_DEVICES_QSPI(func) \
+	BOOT_TARGET_DEVICES_NAND(func) \
 	BOOT_TARGET_DEVICES_USB(func) \
 	BOOT_TARGET_DEVICES_SCSI(func) \
 	BOOT_TARGET_DEVICES_PXE(func) \
diff --git a/include/configs/xilinx_zynqmp_zc1275_revB.h b/include/configs/xilinx_zynqmp_zc1275_revB.h
deleted file mode 100644
index f0880db0b0..0000000000
--- a/include/configs/xilinx_zynqmp_zc1275_revB.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zc1275 RevB
- *
- * (C) Copyright 2018 Xilinx, Inc.
- */
-
-#ifndef __CONFIG_ZYNQMP_ZC1275_REVB_H
-#define __CONFIG_ZYNQMP_ZC1275_REVB_H
-
-#define CONFIG_ZYNQ_SDHCI1
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZC1275_REVB_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
deleted file mode 100644
index f0ab3f1592..0000000000
--- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zc1751 XM015 DC1
- *
- * (C) Copyright 2015 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
-#define __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H
-
-#define CONFIG_ZYNQ_SDHCI0
-#define CONFIG_ZYNQ_SDHCI1
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h b/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h
deleted file mode 100644
index bd4a0c3178..0000000000
--- a/include/configs/xilinx_zynqmp_zc1751_xm017_dc3.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zc1751 XM017 DC3
- *
- * (C) Copyright 2015 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
-#define __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H
-
-#define CONFIG_ZYNQ_SDHCI1
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZC1751_XM017_DC3_H */
diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
deleted file mode 100644
index f39eeb9bfc..0000000000
--- a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zc1751 XM019 DC5
- *
- * (C) Copyright 2015 Xilinx, Inc.
- * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
-#define __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H
-
-#define CONFIG_ZYNQ_SDHCI0
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */
diff --git a/include/configs/xilinx_zynqmp_zcu100.h b/include/configs/xilinx_zynqmp_zcu100.h
deleted file mode 100644
index 5ad9e1be5a..0000000000
--- a/include/configs/xilinx_zynqmp_zcu100.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zcu100
- *
- * (C) Copyright 2015 - 2016 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZCU100_H
-#define __CONFIG_ZYNQMP_ZCU100_H
-
-/* FIXME Will go away soon */
-#define CONFIG_SYS_I2C_MAX_HOPS		1
-#define CONFIG_SYS_NUM_I2C_BUSES	9
-#define CONFIG_SYS_I2C_BUSES	{ \
-				{0, {I2C_NULL_HOP} }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
-				}
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZCU100_H */
diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h
deleted file mode 100644
index ad6bc3d1bf..0000000000
--- a/include/configs/xilinx_zynqmp_zcu102.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zcu102
- *
- * (C) Copyright 2015 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZCU102_H
-#define __CONFIG_ZYNQMP_ZCU102_H
-
-#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_SYS_I2C_MAX_HOPS		1
-#define CONFIG_SYS_NUM_I2C_BUSES	18
-#define CONFIG_SYS_I2C_BUSES	{ \
-				{0, {I2C_NULL_HOP} }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
-				{1, {I2C_NULL_HOP} }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
-				}
-
-#define CONFIG_PCA953X
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
-#define CONFIG_ZYNQ_EEPROM_BUS		5
-#define CONFIG_ZYNQ_GEM_EEPROM_ADDR	0x54
-
-#define CONFIG_SPD_EEPROM
-#define CONFIG_DDR_SPD
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZCU102_H */
diff --git a/include/configs/xilinx_zynqmp_zcu104.h b/include/configs/xilinx_zynqmp_zcu104.h
deleted file mode 100644
index 7e3b9ad705..0000000000
--- a/include/configs/xilinx_zynqmp_zcu104.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zcu104
- *
- * (C) Copyright 2017 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZCU104_H
-#define __CONFIG_ZYNQMP_ZCU104_H
-
-#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_SYS_I2C_MAX_HOPS		1
-#define CONFIG_SYS_NUM_I2C_BUSES	9
-#define CONFIG_SYS_I2C_BUSES	{ \
-				{0, {I2C_NULL_HOP} }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
-				{0, {{I2C_MUX_PCA9548, 0x74, 7} } }, \
-				}
-
-#define CONFIG_PCA953X
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZCU104_H */
diff --git a/include/configs/xilinx_zynqmp_zcu104_revC.h b/include/configs/xilinx_zynqmp_zcu104_revC.h
deleted file mode 100644
index 8b3ae36d0f..0000000000
--- a/include/configs/xilinx_zynqmp_zcu104_revC.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zcu104
- *
- * (C) Copyright 2018 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZCU104_REVC_H
-#define __CONFIG_ZYNQMP_ZCU104_REVC_H
-
-#include <configs/xilinx_zynqmp_zcu104.h>
-
-#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
-#define CONFIG_ZYNQ_EEPROM_BUS 1
-
-#endif /* __CONFIG_ZYNQMP_ZCU104_REVC_H */
diff --git a/include/configs/xilinx_zynqmp_zcu106.h b/include/configs/xilinx_zynqmp_zcu106.h
deleted file mode 100644
index cc2d145ddd..0000000000
--- a/include/configs/xilinx_zynqmp_zcu106.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zcu106
- *
- * (C) Copyright 2016 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZCU106_H
-#define __CONFIG_ZYNQMP_ZCU106_H
-
-#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_SYS_I2C_MAX_HOPS		1
-#define CONFIG_SYS_NUM_I2C_BUSES	18
-#define CONFIG_SYS_I2C_BUSES	{ \
-				{0, {I2C_NULL_HOP} }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
-				{1, {I2C_NULL_HOP} }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
-				}
-
-#define CONFIG_PCA953X
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
-#define CONFIG_ZYNQ_EEPROM_BUS		5
-#define CONFIG_ZYNQ_GEM_EEPROM_ADDR	0x54
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZCU106_H */
diff --git a/include/configs/xilinx_zynqmp_zcu111.h b/include/configs/xilinx_zynqmp_zcu111.h
deleted file mode 100644
index 8f8cb4f087..0000000000
--- a/include/configs/xilinx_zynqmp_zcu111.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zcu111
- *
- * (C) Copyright 2017 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZCU111_H
-#define __CONFIG_ZYNQMP_ZCU111_H
-
-#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_SYS_I2C_MAX_HOPS		1
-#define CONFIG_SYS_NUM_I2C_BUSES	21
-#define CONFIG_SYS_I2C_BUSES	{ \
-				{0, {I2C_NULL_HOP} }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
-				{0, {{I2C_MUX_PCA9544, 0x75, 3} } }, \
-				{1, {I2C_NULL_HOP} }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 5} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x74, 6} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
-				{1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
-				}
-
-#define CONFIG_PCA953X
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
-#define CONFIG_ZYNQ_EEPROM_BUS		5
-#define CONFIG_ZYNQ_GEM_EEPROM_ADDR	0x54
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZCU111_H */
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 1710feda91..a285fcdece 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -102,20 +102,6 @@
 # define DFU_ALT_INFO
 #endif
 
-/* I2C */
-#if defined(CONFIG_SYS_I2C_ZYNQ)
-# define CONFIG_SYS_I2C
-#endif
-
-/* EEPROM */
-#ifdef CONFIG_ZYNQ_EEPROM
-# define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
-# define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
-# define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
-# define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
-# define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
-#endif
-
 /* Allow to overwrite serial and ethaddr */
 #define CONFIG_ENV_OVERWRITE
 
@@ -153,11 +139,62 @@
 #define BOOT_TARGET_DEVICES_DHCP(func)
 #endif
 
+#if defined(CONFIG_ZYNQ_QSPI)
+# define BOOT_TARGET_DEVICES_QSPI(func)	func(QSPI, qspi, na)
+#else
+# define BOOT_TARGET_DEVICES_QSPI(func)
+#endif
+
+#if defined(CONFIG_NAND_ZYNQ)
+# define BOOT_TARGET_DEVICES_NAND(func)	func(NAND, nand, na)
+#else
+# define BOOT_TARGET_DEVICES_NAND(func)
+#endif
+
+#if defined(CONFIG_MTD_NOR_FLASH)
+# define BOOT_TARGET_DEVICES_NOR(func)	func(NOR, nor, na)
+#else
+# define BOOT_TARGET_DEVICES_NOR(func)
+#endif
+
+#define BOOTENV_DEV_XILINX(devtypeu, devtypel, instance) \
+	"bootcmd_xilinx=run $modeboot\0"
+
+#define BOOTENV_DEV_NAME_XILINX(devtypeu, devtypel, instance) \
+	"xilinx "
+
+#define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
+	"bootcmd_qspi=sf probe 0 0 0 && " \
+		      "sf read $scriptaddr $script_offset_f $script_size_f && " \
+		      "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
+	"qspi "
+
+#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
+	"bootcmd_nand=nand info && " \
+		      "nand read $scriptaddr $script_offset_f $script_size_f && " \
+		      "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
+	"nand "
+
+#define BOOTENV_DEV_NOR(devtypeu, devtypel, instance) \
+	"bootcmd_nor=cp.b $scropt_offset_nor $scriptaddr $script_size_f && " \
+		     "source ${scriptaddr}; echo SCRIPT FAILED: continuing...;\0"
+
+#define BOOTENV_DEV_NAME_NOR(devtypeu, devtypel, instance) \
+	"nor "
+
 #define BOOT_TARGET_DEVICES(func) \
 	BOOT_TARGET_DEVICES_MMC(func) \
+	BOOT_TARGET_DEVICES_QSPI(func) \
+	BOOT_TARGET_DEVICES_NAND(func) \
+	BOOT_TARGET_DEVICES_NOR(func) \
 	BOOT_TARGET_DEVICES_USB(func) \
 	BOOT_TARGET_DEVICES_PXE(func) \
-	BOOT_TARGET_DEVICES_DHCP(func)
+	BOOT_TARGET_DEVICES_DHCP(func) \
+	func(XILINX, xilinx, na)
 
 #include <config_distro_bootcmd.h>
 #endif /* CONFIG_SPL_BUILD */
@@ -172,6 +209,10 @@
 	"nor_flash_off=0xE2100000\0"	\
 	"fdt_high=0x20000000\0"		\
 	"initrd_high=0x20000000\0"	\
+	"scriptaddr=0x20000\0"	\
+	"script_offser_nor=0xE2FC0000\0"	\
+	"script_offset_f=0xFC0000\0"	\
+	"script_size_f=0x40000\0"	\
 	"loadbootenv_addr=0x2000000\0" \
 	"fdt_addr_r=0x1f00000\0"        \
 	"pxefile_addr_r=0x2000000\0"    \
diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h
deleted file mode 100644
index b5a28dab87..0000000000
--- a/include/configs/zynq_zc70x.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2013 Xilinx, Inc.
- *
- * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards
- * See zynq-common.h for Zynq common configs
- */
-
-#ifndef __CONFIG_ZYNQ_ZC70X_H
-#define __CONFIG_ZYNQ_ZC70X_H
-
-#define CONFIG_ZYNQ_EEPROM
-
-#include <configs/zynq-common.h>
-
-#endif /* __CONFIG_ZYNQ_ZC70X_H */