diff options
| author | Dario Binacchi <dariobin@libero.it> | 2020-04-13 14:36:27 +0200 |
|---|---|---|
| committer | Lukasz Majewski <lukma@denx.de> | 2020-08-24 11:03:26 +0200 |
| commit | 16bdc85b488dd2f9463a71d6aa09bdf5ea9a9978 (patch) | |
| tree | cbf9247c78ad6be5ad628ab73cc32975bcf4099d /test | |
| parent | cd16c57bd0d6c498d5c180d70c6f0f690e9c32de (diff) | |
clk: set flags in the ccf registration routines
The top-level framework flags are passed as parameter to the common
clock framework (ccf) registration routines without being used.
Checks of the flags setting added by the patch have been added in the
ccf test.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Diffstat (limited to 'test')
| -rw-r--r-- | test/dm/clk_ccf.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c index 960cb2db0d..242d2d756f 100644 --- a/test/dm/clk_ccf.c +++ b/test/dm/clk_ccf.c @@ -30,11 +30,13 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_ECSPI_ROOT, &clk); ut_assertok(ret); ut_asserteq_str("ecspi_root", clk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, clk->flags); /* Test for clk_get_parent_rate() */ ret = clk_get_by_id(SANDBOX_CLK_ECSPI1, &clk); ut_assertok(ret); ut_asserteq_str("ecspi1", clk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 20000000); @@ -43,6 +45,7 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_ECSPI0, &clk); ut_assertok(ret); ut_asserteq_str("ecspi0", clk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 20000000); @@ -51,6 +54,7 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_USDHC1_SEL, &clk); ut_assertok(ret); ut_asserteq_str("usdhc1_sel", clk->dev->name); + ut_asserteq(CLK_SET_RATE_NO_REPARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 60000000); @@ -58,17 +62,20 @@ static int dm_test_clk_ccf(struct unit_test_state *uts) ret = clk_get_by_id(SANDBOX_CLK_USDHC2_SEL, &clk); ut_assertok(ret); ut_asserteq_str("usdhc2_sel", clk->dev->name); + ut_asserteq(CLK_SET_RATE_NO_REPARENT, clk->flags); rate = clk_get_parent_rate(clk); ut_asserteq(rate, 80000000); pclk = clk_get_parent(clk); ut_asserteq_str("pll3_80m", pclk->dev->name); + ut_asserteq(CLK_SET_RATE_PARENT, pclk->flags); /* Test the composite of CCF */ ret = clk_get_by_id(SANDBOX_CLK_I2C, &clk); ut_assertok(ret); ut_asserteq_str("i2c", clk->dev->name); + ut_asserteq(CLK_SET_RATE_UNGATE, clk->flags); rate = clk_get_rate(clk); ut_asserteq(rate, 60000000); |