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diff --git a/arch/arm/dts/versal-mini-emmc1.dts b/arch/arm/dts/versal-mini-emmc1.dts
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+// SPDX-License-Identifier: GPL-2.0
+/*
+ * dts file for Xilinx Versal Mini eMMC1 Configuration
+ *
+ * (C) Copyright 2018-2019, Xilinx, Inc.
+ *
+ * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "xlnx,versal";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "Xilinx Versal MINI eMMC1";
+
+ clk25: clk25 {
+ compatible = "fixed-clock";
+ #clock-cells = <0x0>;
+ clock-frequency = <25000000>;
+ };
+
+ dcc: dcc {
+ compatible = "arm,dcc";
+ status = "okay";
+ u-boot,dm-pre-reloc;
+ };
+
+ amba: amba {
+ u-boot,dm-pre-reloc;
+ compatible = "simple-bus";
+ #address-cells = <0x2>;
+ #size-cells = <0x2>;
+ ranges;
+
+ sdhci1: sdhci@f105000 {
+ compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
+ status = "okay";
+ reg = <0x0 0xf1050000 0x0 0x10000>;
+ clock-names = "clk_xin", "clk_ahb";
+ clocks = <&clk25 &clk25>;
+ xlnx,device_id = <1>;
+ no-1-8-v;
+ xlnx,mio_bank = <0>;
+ #stream-id-cells = <1>;
+ };
+ };
+
+ aliases {
+ serial0 = &dcc;
+ mmc0 = &sdhci1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x20000000>;
+ };
+};