3 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig
index e9f7e7e489..9bb5a5c202 100644
--- a/arch/arm/mach-zynqmp/Kconfig
+++ b/arch/arm/mach-zynqmp/Kconfig
@@ -99,6 +99,17 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
 config ZYNQ_SDHCI_MAX_FREQ
 	default 200000000
 
+config SPL_ZYNQMP_TWO_SDHCI
+	bool "Enable booting from both SDHCIs"
+	depends on SPL
+	help
+	  This option reflects that board has two SDHCI controllers which
+	  platform can use as boot device. This option ensures that SPL will
+	  setup BOOT_DEVICE_MMC2 for SDHCI1 controller and BOOT_DEVICE_MMC1 for
+	  SDHCI0 controller. Platforms which have only one SDHCI controller
+	  shouldn't enable this option because it for software SDHCI0 or SDHCI1
+	  are both covered by BOOT_DEVICE_MMC1.
+
 config SPL_ZYNQMP_ALT_BOOTMODE
 	hex
 	default 0x0 if JTAG_MODE
diff --git a/arch/arm/mach-zynqmp/include/mach/hardware.h b/arch/arm/mach-zynqmp/include/mach/hardware.h
index efb4bba4b8..a0d776166d 100644
--- a/arch/arm/mach-zynqmp/include/mach/hardware.h
+++ b/arch/arm/mach-zynqmp/include/mach/hardware.h
@@ -7,9 +7,6 @@
 #ifndef _ASM_ARCH_HARDWARE_H
 #define _ASM_ARCH_HARDWARE_H
 
-#define ZYNQ_I2C_BASEADDR0	0xFF020000
-#define ZYNQ_I2C_BASEADDR1	0xFF030000
-
 #define ARASAN_NAND_BASEADDR	0xFF100000
 
 #define ZYNQMP_TCM_BASE_ADDR	0xFFE00000
diff --git a/arch/arm/mach-zynqmp/spl.c b/arch/arm/mach-zynqmp/spl.c
index fb3955c93f..f6f5414201 100644
--- a/arch/arm/mach-zynqmp/spl.c
+++ b/arch/arm/mach-zynqmp/spl.c
@@ -85,7 +85,7 @@ u32 spl_boot_device(void)
 	case SD_MODE1:
 	case SD1_LSHFT_MODE: /* not working on silicon v1 */
 /* if both controllers enabled, then these two are the second controller */
-#if defined(CONFIG_ZYNQ_SDHCI0) && defined(CONFIG_ZYNQ_SDHCI1)
+#if defined(SPL_ZYNQMP_TWO_SDHCI)
 		return BOOT_DEVICE_MMC2;
 /* else, fall through, the one SDHCI controller that is enabled is number 1 */
 #endif