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Diffstat (limited to 'arch/riscv/lib')
-rw-r--r--arch/riscv/lib/cache.c32
1 files changed, 23 insertions, 9 deletions
diff --git a/arch/riscv/lib/cache.c b/arch/riscv/lib/cache.c
index d642a38a07..ae5c60716f 100644
--- a/arch/riscv/lib/cache.c
+++ b/arch/riscv/lib/cache.c
@@ -6,8 +6,18 @@
#include <common.h>
+void invalidate_icache_all(void)
+{
+ asm volatile ("fence.i" ::: "memory");
+}
+
+void flush_dcache_all(void)
+{
+ asm volatile ("fence" :::"memory");
+}
void flush_dcache_range(unsigned long start, unsigned long end)
{
+ flush_dcache_all();
}
void invalidate_icache_range(unsigned long start, unsigned long end)
@@ -19,41 +29,45 @@ void invalidate_icache_range(unsigned long start, unsigned long end)
invalidate_icache_all();
}
-void invalidate_icache_all(void)
+void invalidate_dcache_range(unsigned long start, unsigned long end)
{
- asm volatile ("fence.i" ::: "memory");
+ flush_dcache_all();
}
-void invalidate_dcache_range(unsigned long start, unsigned long end)
+void cache_flush(void)
{
+ invalidate_icache_all();
+ flush_dcache_all();
}
void flush_cache(unsigned long addr, unsigned long size)
{
+ invalidate_icache_all();
+ flush_dcache_all();
}
-void icache_enable(void)
+__weak void icache_enable(void)
{
}
-void icache_disable(void)
+__weak void icache_disable(void)
{
}
-int icache_status(void)
+__weak int icache_status(void)
{
return 0;
}
-void dcache_enable(void)
+__weak void dcache_enable(void)
{
}
-void dcache_disable(void)
+__weak void dcache_disable(void)
{
}
-int dcache_status(void)
+__weak int dcache_status(void)
{
return 0;
}