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-rw-r--r--board/opalkelly/zynq/board.c2
-rw-r--r--board/xilinx/common/board.c38
-rw-r--r--board/xilinx/versal/board.c76
-rw-r--r--board/xilinx/zynq/Makefile1
-rw-r--r--board/xilinx/zynq/board.c38
-rw-r--r--board/xilinx/zynqmp/Makefile1
-rw-r--r--board/xilinx/zynqmp/zynqmp.c51
7 files changed, 143 insertions, 64 deletions
diff --git a/board/opalkelly/zynq/board.c b/board/opalkelly/zynq/board.c
index a95c9d1eff..ee666185ec 100644
--- a/board/opalkelly/zynq/board.c
+++ b/board/opalkelly/zynq/board.c
@@ -1 +1,3 @@
+#include "../../xilinx/common/board.c"
+
#include "../../xilinx/zynq/board.c"
diff --git a/board/xilinx/common/board.c b/board/xilinx/common/board.c
new file mode 100644
index 0000000000..7e6340bad6
--- /dev/null
+++ b/board/xilinx/common/board.c
@@ -0,0 +1,38 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2014 - 2019 Xilinx, Inc.
+ * Michal Simek <michal.simek@xilinx.com>
+ */
+
+#include <common.h>
+#include <dm/uclass.h>
+#include <i2c.h>
+
+int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
+{
+ int ret = -EINVAL;
+
+#if defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
+ struct udevice *dev;
+ ofnode eeprom;
+
+ eeprom = ofnode_get_chosen_node("xlnx,eeprom");
+ if (!ofnode_valid(eeprom))
+ return -ENODEV;
+
+ debug("%s: Path to EEPROM %s\n", __func__,
+ ofnode_get_chosen_prop("xlnx,eeprom"));
+
+ ret = uclass_get_device_by_ofnode(UCLASS_I2C_EEPROM, eeprom, &dev);
+ if (ret)
+ return ret;
+
+ ret = dm_i2c_read(dev, CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET, ethaddr, 6);
+ if (ret)
+ debug("%s: I2C EEPROM MAC address read failed\n", __func__);
+ else
+ debug("%s: I2C EEPROM MAC %pM\n", __func__, ethaddr);
+#endif
+
+ return ret;
+}
diff --git a/board/xilinx/versal/board.c b/board/xilinx/versal/board.c
index 2b3a40b73a..90751477b5 100644
--- a/board/xilinx/versal/board.c
+++ b/board/xilinx/versal/board.c
@@ -21,42 +21,46 @@ int board_init(void)
int board_early_init_r(void)
{
- if (current_el() == 3) {
- u32 val;
-
- writel(IOU_SWITCH_CTRL_CLKACT_BIT |
- (0x20 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
- &crlapb_base->iou_switch_ctrl);
-
- /* Global timer init - Program time stamp reference clk */
- val = readl(&crlapb_base->timestamp_ref_ctrl);
- val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
- writel(val, &crlapb_base->timestamp_ref_ctrl);
-
- debug("ref ctrl 0x%x\n",
- readl(&crlapb_base->timestamp_ref_ctrl));
-
- /* Clear reset of timestamp reg */
- writel(0, &crlapb_base->rst_timestamp);
-
- /*
- * Program freq register in System counter and
- * enable system counter.
- */
- writel(COUNTER_FREQUENCY,
- &iou_scntr_secure->base_frequency_id_register);
-
- debug("counter val 0x%x\n",
- readl(&iou_scntr_secure->base_frequency_id_register));
-
- writel(IOU_SCNTRS_CONTROL_EN,
- &iou_scntr_secure->counter_control_register);
-
- debug("scntrs control 0x%x\n",
- readl(&iou_scntr_secure->counter_control_register));
- debug("timer 0x%llx\n", get_ticks());
- debug("timer 0x%llx\n", get_ticks());
- }
+ u32 val;
+
+ if (current_el() != 3)
+ return 0;
+
+ debug("iou_switch ctrl div0 %x\n",
+ readl(&crlapb_base->iou_switch_ctrl));
+
+ writel(IOU_SWITCH_CTRL_CLKACT_BIT |
+ (CONFIG_IOU_SWITCH_DIVISOR0 << IOU_SWITCH_CTRL_DIVISOR0_SHIFT),
+ &crlapb_base->iou_switch_ctrl);
+
+ /* Global timer init - Program time stamp reference clk */
+ val = readl(&crlapb_base->timestamp_ref_ctrl);
+ val |= CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT;
+ writel(val, &crlapb_base->timestamp_ref_ctrl);
+
+ debug("ref ctrl 0x%x\n",
+ readl(&crlapb_base->timestamp_ref_ctrl));
+
+ /* Clear reset of timestamp reg */
+ writel(0, &crlapb_base->rst_timestamp);
+
+ /*
+ * Program freq register in System counter and
+ * enable system counter.
+ */
+ writel(COUNTER_FREQUENCY,
+ &iou_scntr_secure->base_frequency_id_register);
+
+ debug("counter val 0x%x\n",
+ readl(&iou_scntr_secure->base_frequency_id_register));
+
+ writel(IOU_SCNTRS_CONTROL_EN,
+ &iou_scntr_secure->counter_control_register);
+
+ debug("scntrs control 0x%x\n",
+ readl(&iou_scntr_secure->counter_control_register));
+ debug("timer 0x%llx\n", get_ticks());
+ debug("timer 0x%llx\n", get_ticks());
return 0;
}
diff --git a/board/xilinx/zynq/Makefile b/board/xilinx/zynq/Makefile
index e7645be189..8d33015439 100644
--- a/board/xilinx/zynq/Makefile
+++ b/board/xilinx/zynq/Makefile
@@ -4,6 +4,7 @@
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
obj-y := board.o
+obj-y += ../common/board.o
ifneq ($(CONFIG_XILINX_PS_INIT_FILE),"")
PS_INIT_FILE := $(shell cd $(srctree); readlink -f $(CONFIG_XILINX_PS_INIT_FILE))
diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 614d93c082..b4b84df576 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -8,6 +8,7 @@
#include <dm/uclass.h>
#include <fdtdec.h>
#include <fpga.h>
+#include <malloc.h>
#include <mmc.h>
#include <watchdog.h>
#include <wdt.h>
@@ -53,39 +54,54 @@ int board_init(void)
int board_late_init(void)
{
+ int env_targets_len = 0;
+ const char *mode;
+ char *new_targets;
+ char *env_targets;
+
switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
case ZYNQ_BM_QSPI:
+ mode = "qspi";
env_set("modeboot", "qspiboot");
break;
case ZYNQ_BM_NAND:
+ mode = "nand";
env_set("modeboot", "nandboot");
break;
case ZYNQ_BM_NOR:
+ mode = "nor";
env_set("modeboot", "norboot");
break;
case ZYNQ_BM_SD:
+ mode = "mmc";
env_set("modeboot", "sdboot");
break;
case ZYNQ_BM_JTAG:
+ mode = "pxe dhcp";
env_set("modeboot", "jtagboot");
break;
default:
+ mode = "";
env_set("modeboot", "");
break;
}
- return 0;
-}
+ /*
+ * One terminating char + one byte for space between mode
+ * and default boot_targets
+ */
+ env_targets = env_get("boot_targets");
+ if (env_targets)
+ env_targets_len = strlen(env_targets);
-int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
-{
-#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
- defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
- if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
- CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
- ethaddr, 6))
- printf("I2C EEPROM MAC address read failed\n");
-#endif
+ new_targets = calloc(1, strlen(mode) + env_targets_len + 2);
+ if (!new_targets)
+ return -ENOMEM;
+
+ sprintf(new_targets, "%s %s", mode,
+ env_targets ? env_targets : "");
+
+ env_set("boot_targets", new_targets);
return 0;
}
diff --git a/board/xilinx/zynqmp/Makefile b/board/xilinx/zynqmp/Makefile
index 960b81fc58..80f8ca7e1e 100644
--- a/board/xilinx/zynqmp/Makefile
+++ b/board/xilinx/zynqmp/Makefile
@@ -4,6 +4,7 @@
# Michal Simek <michal.simek@xilinx.com>
obj-y := zynqmp.o
+obj-y += ../common/board.o
ifneq ($(CONFIG_XILINX_PS_INIT_FILE),"")
PS_INIT_FILE := $(shell cd $(srctree); readlink -f $(CONFIG_XILINX_PS_INIT_FILE))
diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
index 41e88b03f9..5e1d2116bc 100644
--- a/board/xilinx/zynqmp/zynqmp.c
+++ b/board/xilinx/zynqmp/zynqmp.c
@@ -20,7 +20,6 @@
#include <usb.h>
#include <dwc3-uboot.h>
#include <zynqmppl.h>
-#include <i2c.h>
#include <g_dnl.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -409,22 +408,6 @@ int board_early_init_r(void)
return 0;
}
-int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
-{
-#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
- defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET) && \
- defined(CONFIG_ZYNQ_EEPROM_BUS)
- i2c_set_bus_num(CONFIG_ZYNQ_EEPROM_BUS);
-
- if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
- CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
- ethaddr, 6))
- printf("I2C EEPROM MAC address read failed\n");
-#endif
-
- return 0;
-}
-
unsigned long do_go_exec(ulong (*entry)(int, char * const []), int argc,
char * const argv[])
{
@@ -531,6 +514,36 @@ static u32 reset_reason(void)
return ret;
}
+static int set_fdtfile(void)
+{
+ char *compatible, *fdtfile;
+ const char *suffix = ".dtb";
+ const char *vendor = "xilinx/";
+
+ if (env_get("fdtfile"))
+ return 0;
+
+ compatible = (char *)fdt_getprop(gd->fdt_blob, 0, "compatible", NULL);
+ if (compatible) {
+ debug("Compatible: %s\n", compatible);
+
+ /* Discard vendor prefix */
+ strsep(&compatible, ",");
+
+ fdtfile = calloc(1, strlen(vendor) + strlen(compatible) +
+ strlen(suffix) + 1);
+ if (!fdtfile)
+ return -ENOMEM;
+
+ sprintf(fdtfile, "%s%s%s", vendor, compatible, suffix);
+
+ env_set("fdtfile", fdtfile);
+ free(fdtfile);
+ }
+
+ return 0;
+}
+
int board_late_init(void)
{
u32 reg = 0;
@@ -553,6 +566,10 @@ int board_late_init(void)
return 0;
}
+ ret = set_fdtfile();
+ if (ret)
+ return ret;
+
ret = zynqmp_mmio_read((ulong)&crlapb_base->boot_mode, &reg);
if (ret)
return -EINVAL;
generated by cgit (git 2.34.1) at 2025-01-08 04:04:02 +0000