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-rw-r--r--drivers/watchdog/omap_wdt.c21
1 files changed, 15 insertions, 6 deletions
diff --git a/drivers/watchdog/omap_wdt.c b/drivers/watchdog/omap_wdt.c
index 7b1f429432..d724c964ed 100644
--- a/drivers/watchdog/omap_wdt.c
+++ b/drivers/watchdog/omap_wdt.c
@@ -53,16 +53,25 @@ void hw_watchdog_reset(void)
{
struct wd_timer *wdt = (struct wd_timer *)WDT_BASE;
- /* wait for posted write to complete */
- while ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WTGR)
- ;
+ /*
+ * Somebody just triggered watchdog reset and write to WTGR register
+ * is in progress. It is resetting right now, no need to trigger it
+ * again
+ */
+ if ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WTGR)
+ return;
wdt_trgr_pattern = ~wdt_trgr_pattern;
writel(wdt_trgr_pattern, &wdt->wdtwtgr);
- /* wait for posted write to complete */
- while ((readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WTGR))
- ;
+ /*
+ * Don't wait for posted write to complete, i.e. don't check
+ * WDT_WWPS_PEND_WTGR bit in WWPS register. There is no writes to
+ * WTGR register outside of this func, and if entering it
+ * we see WDT_WWPS_PEND_WTGR bit set, it means watchdog reset
+ * was just triggered. This prevents us from wasting time in busy
+ * polling of WDT_WWPS_PEND_WTGR bit.
+ */
}
static int omap_wdt_set_timeout(unsigned int timeout)