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2019-11-14pinctrol: dm: remove the function pinctrl_decode_pin_configPatrick Delaunay
Remove the pinctrl_decode_pin_config() API, because this function is unused and not compatible with livetree (it uses fdtdec_get_bool instead of ofnode API). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-11-12Merge branch '2019-11-12-migrate-SYS_REDUNDAND_ENVIRONMENT'Tom Rini
- Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig. This is size neutral outside of two platforms with latent bugs being fixed now and they no longer have "ENV_IS_NOWHERE" set along with their intended location.
2019-11-12defconfigs: Migrate CONFIG_SYS_REDUNDAND_ENVIRONMENTTom Rini
Move this symbol to Kconfig. As part of this we can drop a UBI-specific symbol that was a stop-gap for not having this particular symbol in Kconfig. Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-12pfla02: Migrate CONFIG_ENV_IS_IN_SPI_FLASH to defconfigTom Rini
This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather than defconfig, fix. Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-12evb-rk3128: Migrate CONFIG_ENV_IS_IN_MMC to defconfigTom Rini
This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than defconfig, fix. Cc: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-12Merge tag 'u-boot-imx-20191105' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20191105 ------------------- i.MX8MN SoC support ROM API image download support i.MX8MM enet enabling
2019-11-11Prepare v2020.01-rc2Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-11configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-11gitattributes: dont treat non-text files as textVignesh Rajendran
With recent update in u-boot gitattributes all files are treated as regular text files. This creates problems with special files and repo always shows uncommitted files like below. Your branch is up-to-date with 'origin/master'. Changes not staged for commit: (use "git add <file>..." to update what will be committed) (use "git checkout -- <file>..." to discard changes in working directory) modified: tools/logos/compulab.bmp modified: tools/logos/denx-comp.bmp modified: tools/logos/toradex.bmp To fix above problem special files bmp/ttf files are treated as binary files in the gitattributes. Signed-off-by: Vignesh Rajendran <vignesh.rajendran@in.bosch.com> Signed-off-by: Veeraiyan Chidambaram <veeraiyan.chidambaram@in.bosch.com>
2019-11-11.gitignore: Ignore .img filesMichael Trimarchi
The generated idbloader.img file that rockchip uses should be not included in git status report Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2019-11-11binman: tegra: Adjust symbol calculation depending on end-at-4gbSimon Glass
A recent change adjusted the symbol calculation to work on x86 but broke it for Tegra. In fact this is because they have different needs. On x86 devices the code is linked to a ROM address and the end-at-4gb property is used for the image. In this case there is no need to add the base address of the image, since the base address is already built into the offset and image-pos properties. On other devices we must add the base address since the offsets start at zero. In addition the base address is currently added to the 'offset' and 'size' values. It should in fact only be added to 'image-pos', since 'offset' is relative to its parent and 'size' is not actually an address. This code should have been adjusted when support for 'image-pos' and 'size' was added, but it was not. To correct these problems: - move the code that handles adding the base address to section.py, which can check the end-at-4gb property and which property (offset/size/image-pos) is being read - add the base address only when needed (only for image-pos and not if the image uses end-at-4gb) - add a note to the documentation - add a separate test to cover x86 behaviour Fixes: 15c981cc (binman: Correct symbol calculation with non-zero image base) Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
2019-11-11Merge tag 'u-boot-rockchip-20191110' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Add support for rockchip pmic rk805,rk809, rk816, rk817 - Add rk3399 board Leez support - Fix bug in rk3328 ram driver - Adapt SPL to support ATF bl31 with entry at 0x40000 - Fix the u8 type comparision with '-1'. - Fix checkpatch warning for multi blank line and review signature.
2019-11-11Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC. - Few bug fixes and updates related to SPI, hwconfig, ethernet, fsl-layerscape, pci, icid, PSCI
2019-11-10rockchip: firefly-rk3288: Enable TPL supportKever Yang
This patch enable TPL support for firefly-rk3288 board, which works ths same way with other RK3288 board like Tinker, evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: adding the missing "/" in entries of boot_devicesLevin Du
Without the prefix, "same-as-spl" in `u-boot,spl-boot-order` will not work as expected. When board_boot_order() `spl-boot-order.c` meets "same-as-spl", it gets the conf by looking the boot_devices table by boot source, and parse the node by the conf with: node = fdt_path_offset(blob, conf); which will failed without the "/" indicating the path. Currently only entries of boot_devices in rk3399 have the "/" prefix. Therefore add the missing ones in other boards. Signed-off-by: Levin Du <djw@t-chip.com.cn> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUsKever Yang
Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to limit the SPL size in 0x40000(start from 0) so that we don't need to do the relocate for ATF loading. Note that there will be separate BSS, STACK and MALLOC heap, so the size 0x40000(256KB) should be enough for SPL text. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: rk3399: update SPL_STACK_R_ADDRKever Yang
Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config; default to 0x4000000(64MB) instead of 0x80000(512KB) for this address can support all the SoCs including those may have only 64MB memory, and also reserve enough space for atf, kernel(in falcon mode) loading. After the ATF entry move to 0x40000, the stack from 0x80000 may be override when loading ATF bl31. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: evb-px5: defconfig: no need to reserve IRAM for SPLKever Yang
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code, and when we introduce the TPL, the SPL space is in DRAM, we reserve space to avoid SPL text overlap with ATF bl31. Now we decide to move ATF entry point to 0x40000 instead of 0x1000, so that the SPL can have 0x4000 as code size and no need to reserve space or relocate before loading ATF. The mainline ATF has update since: 0aad563c rockchip: Update BL31_BASE to 0x40000 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: rk3328: defconfig: no need to reserve IRAM for SPLKever Yang
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code, and when we introduce the TPL, the SPL space is in DRAM, we reserve space to avoid SPL text overlap with ATF bl31. Now we decide to move ATF entry point to 0x40000 instead of 0x1000, so that the SPL can have 0x4000 as code size and no need to reserve space or relocate before loading ATF. The mainline ATF has update since: 0aad563c rockchip: Update BL31_BASE to 0x40000 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: rk3399: defconfig: no need to reserve IRAM for SPLKever Yang
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code, and when we introduce the TPL, the SPL space is in DRAM, we reserve space to avoid SPL text overlap with ATF bl31. Now we decide to move ATF entry point to 0x40000 instead of 0x1000, so that the SPL can have 0x4000 as code size and no need to reserve space or relocate before loading ATF. The mainline ATF has update since: 0aad563c rockchip: Update BL31_BASE to 0x40000 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10common: spl: atf: support booting bl32 imageJoseph Chen
Trusted-Firmware can also initialize a secure payload to use as a trusted execution environment. In general for the arm64 case this is provided as separate image and uboot is supposed to also place it in a predetermined location in memory and add the necessary parameters to the ATF boot params. So add the possibility to get this tee payload from the provided FIT image and setup things as necessary. Tested on a Rockchip PX30 with mainline TF-A, mainline OP-Tee (with pending PX30 support) and mainline 5.4-rc1 Linux kernel. Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: make_fit_atf.py: allow inclusion of a tee binaryHeiko Stuebner
A trusted execution environment should also get loaded as loadable from a fit image, so add the possibility to present a tee.elf to make_fit_atf.py that then gets included as additional loadable into the generated its. For ease of integration the additional loadable is created as atf_(x+1) after all others to re-use core generation loops. Tested against the combinations of 1-part-atf and multi-part-atf each time with and without a tee binary present. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10ram: rk3328: Fix loading of skew valuesSimon South
Fix a typo that caused incorrect values to be loaded into the DRAM controller's deskew registers. Signed-off-by: Simon South <simon@simonsouth.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10ram: rk3328: Use correct frequency units in functionSimon South
Fix a pair of tests in phy_dll_bypass_set() that used incorrect units for the DDR frequency, causing the DRAM controller to be misconfigured in most cases. Signed-off-by: Simon South <simon@simonsouth.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: dts: rk3328: rock64: Add same-as-spl orderEmmanuel Vadot
rk3328 can use same-as-spl option so next loaders are loaded from the same medium. Add the boot order in the rock64 dts otherwise booting from sdcard will result in u-boot looking into the eMMC. Signed-off-by: Emmanuel Vadot <manu@freebsd.org> Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Tested-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10clk: rockchip: rk3328: Configure CPU clockSimon South
Add a call to rk3328_configure_cpu() during initialization to set the CPU-clock frequency. Signed-off-by: Simon South <simon@simonsouth.net> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10rockchip: rk3399: Add Leez P710 supportAndy Yan
Specification - Rockchip RK3399 - LPDDR4 - TF sd scard slot - eMMC - M.2 B-Key for 4G LTE - AP6256 for WiFi + BT - Gigabit ethernet - HDMI out - 40 pin header - USB 2.0 x 2 - USB 3.0 x 1 - USB 3.0 Type-C x 1 - TYPE-C Power supply Commit details of rk3399-leez-p710.dts sync from linus tree for Linux 5.4-rc1: "arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC" (sha1: fc702ed49a8668a17343811ee28214d845bfc5e6) Signed-off-by: Andy Yan <andyshrk@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10power: pmic: rk809: support rk809 pmicJoseph Chen
The RK809 is a Power Management IC (PMIC) for multimedia and handheld devices. They contains the following components: - Regulators(5*BUCKs, 9*LDOs, 2*SWITCHes) - RTC - Clocking Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10power: pmic: rk817: support rk817 pmicJoseph Chen
The RK817 is a Power Management IC (PMIC) for multimedia and handheld devices. They contains the following components: - Regulators(4*BUCKs, 1* BOOST, 9*LDOs, 1*SWITCH) - RTC - Clocking Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10power: pmic: rk805: support rk805 pmicElaine Zhang
The RK805 are a Power Management IC (PMIC) for multimedia and handheld devices. They contains the following components: - Regulators(4*BUCKs, 3*LDOs) - RTC - Clocking Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10power: pmic: rk816: support rk816 pmicElaine Zhang
The RK816 is a Power Management IC (PMIC) for multimedia and handheld devices. They contains the following components: - Regulators(4*BUCKs, 1*BOOST, 6*LDOs, 1*SWITCH) - RTC - Clocking Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10power: regulator: rk8xx: update the driver for rk808 and rk818Elaine Zhang
In order to adapt the following pmics, make the interface more compatible. Support buck and ldo suspend voltage setting and getting. Supprot buck and ldo suspend enable/disable setting and getting. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-10dm: regulator: support regulator more stateJoseph Chen
support parse regulator standard property: regulator-off-in-suspend; regulator-init-microvolt; regulator-suspend-microvolt: regulator_get_suspend_enable regulator_set_suspend_enable regulator_get_suspend_value regulator_set_suspend_value Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2019-11-08Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini
- Assorted fixes
2019-11-08tools/img2brec.sh: Delete unused toolTom Rini
This script was only used on the MX1ADS board (and possibly other MX1 platforms) to program the flash. As we no longer have any boards for that SoC, remove this tool. Fixes: e570aca9474b ("mx1ads: remove board support") Signed-off-by: Tom Rini <trini@konsulko.com>
2019-11-08Merge branch '2019-11-07-master-imports'Tom Rini
- Add Phytium Durian Board - Assorted bugfixes - Allow for make ERR_PTR/PTR_ERR architecture specific
2019-11-08Merge branch '2019-11-07-ti-imports'Tom Rini
- LogicPD platform fixes - Adaptive Voltage Scaling (AVS) support - Minor bugfixes
2019-11-08cmd: move down CONFIG_CMD_BOOTEFI after CONFIG_BOOTM_VXWORKSAKASHI Takahiro
Due to the commit 4b0bcfa7c4ec ("Kconfig: Migrate CONFIG_BOOTM_* options") BOOTEFI and BOOTEFI_HELLO_COMPILE (and other BOOTEFI configs) are displayed in a long distance. This will make it difficult for us to understand that those configurations are closely related. Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-08freescale/powerpc: Rename the config CONFIG_SECURE_BOOT nameUdit Agarwal
Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid conflicts with UEFI secure boot. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08freescale/layerscape: Rename the config CONFIG_SECURE_BOOT nameUdit Agarwal
Rename CONFIG_SECURE_BOOT to CONFIG_NXP_ESBC to avoid conflict with UEFI secure boot. Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08configs: spi: Add the SPI_FLASH_BAR for ESPIXiaowei Bao
Add the SPI_FLASH_BAR for the ESPI controller of FSL, this entry is missed by commit 6d8251783641 ("configs: Don't use SPI_FLASH_BAR as default") Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08fsl-layerscape: fix warning if no hwconfig is definedPankaj Bansal
While getting the 'subarg' of 'hwconfig' env variable in config_core_prefetch(), if no hwconfig variable is defined, below warning is received: WARNING: Calling __hwconfig without a buffer and before environment is ready Fix this by checking 'hwconfig' env variable. If not found return without further processing. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Tested-by: Michael Walle <michael@walle.cc>
2019-11-08usb: xhci: support 1.1 or later versionChunfeng Yun
The xHCI 1.1 version also need set Transfer Type field Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-11-08drivers: net: fsl_enetc: fix RGMII configurationMichael Walle
Add the missing RGMII PHY modes in which case the MAC has configure its RGMII settings. The only difference between these modes is the RX and TX delay configuration. A user might choose any RGMII mode in the device tree. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08drivers: net: fsl_enetc: set phydev->nodeMichael Walle
The saved ofnode is used by some PHY drivers to access the device tree node of the PHY. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Alex Marginean <alexm.osslist@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08armv8: fsl-layerscape: introduce fsl_board_late_init()Michael Walle
The fsl-layerscape already occupies board_late_init(), therefore it is not possible for a board to have its own board_late_init(). Introduce fsl_board_late_init() which can be implemented in the board specific code. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08armv8: fsl-lsch3: convert CONFIG_TARGET_x to CONFIG_ARCH_xMichael Walle
The clocks are not dependent on the target but only on the SoC. Therefore, convert the CONFIG_TARGET_x macros to the corresponding CONFIG_ARCH_x. This will allow other targets to automatically use the common code. Otherwise every new target would have to add itself to the "#if defined(CONFIG_TARGET_x) || .." macros. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08armv8: ls1028a: add erratum A-050382 workaroundLaurentiu Tudor
Erratum A-050382 states that the eDMA ICID programmed in the eDMA_AMQR register in DCFG is not correctly forwarded to the SMMU. The workaround consists in programming the eDMA ICID in the eDMA_AMQR register in DCFG to 40. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08armv8: lx2160a: add icid setup for platform devicesLaurentiu Tudor
Add ICID setup for the platform devices contained on this chip: usb, sata, sdhc, sec. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Horia Geanta <horia.geanta@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-08fsl-layerscape: add missing SATA3 and SATA4 base addressesLaurentiu Tudor
LX2160A chips have 4 sata controllers. Add missing base addresses for SATA3 and SATA4. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Horia Geanta <horia.geanta@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>