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2017-12-11Merge git://git.denx.de/u-boot-arcTom Rini
2017-12-12ARM: uniphier: use FIELD_PREP for PLL settingsMasahiro Yamada
It is tedious to define both mask and bit-shift. <linux/bitfield.h> provides a convenient way to get access to register fields with a single shifted mask. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: compute SSCPLL values more preciselyMasahiro Yamada
Use DIV_ROUND_CLOSEST(). To make the JK value even more precise, I used a bigger coefficient, then divide it by 512. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: fix SSCPLL init code for LD11 SoCDai Okamura
Commit 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") missed to write the computed value to the SSCPLLCTRL2 register. Fixes: 682e09ff9f35 ("ARM: uniphier: add PLL init code for LD20 SoC") Signed-off-by: Dai Okamura <okamura.dai@socionext.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12mtd: nand: denali: make NAND_DENALI unconfigurable optionMasahiro Yamada
denali.c has no driver entry in itself. It makes sense only when compiled together with denali_dt.c Let NAND_DENALI_DT select NAND_DENALI, and hide NAND_DENALI from the Kconfig menu. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-12ARM: uniphier: compile pll-base-ld20.c for PXs3Masahiro Yamada
Fix the link error for the combination of CONFIG_ARCH_UNIPHIER_LD11=n CONFIG_ARCH_UNIPHIER_LD20=n CONFIG_ARCH_UNIPHIER_PXS3=y Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-11ARC: clk: introduce HSDK CGU clock driverEugeniy Paltsev
Synopsys HSDK clock controller generates and supplies clocks to various controllers and peripherals within the SoC. Each clock has assigned identifier and client device tree nodes can use this identifier to specify the clock which they consume. All available clocks are defined as preprocessor macros in the dt-bindings/clock/snps,hsdk-cgu.h header and can be used in device tree sources. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11ARC: cache: explicitly initialize "*_exists" variablesEugeniy Paltsev
dcache_exists, icache_exists, slc_exists and ioc_exists global variables in "arch/arc/lib/cache.c" remain uninitialized if SoC doesn't have corresponding HW. This happens because we use the next constructions for their definition and initialization: -------------------------->>--------------------- int ioc_exists __section(".data"); if (/* condition */) ioc_exists = 1; -------------------------->>--------------------- That's quite a non-trivial issue as one may think of it. The point is we intentionally put those variables in ".data" section so they might survive relocation (remember we initilaize them very early before relocation and continue to use after reloaction). While being non-initialized and not explicitly put in .data section they would end-up in ".bss" section which by definition is filled with zeroes. But since we place those variables in .data section we need to care about their proper initialization ourselves. Also while at it we change their type to "bool" as more appropriate. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11ARC: add defines of some cache and xCCM AUX registersEugeniy Paltsev
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11ARC: add macro to get CPU idEugeniy Paltsev
ARCNUM [15:8] field in ARC_AUX_IDENTITY register allows us to uniquely identify each core in a multi-core system. I.e. with help of this macro each core may get its index in SMP system. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-11ARC: HSDK: Fixup DW SDIO CIU frequency to 50000000HzEugeniy Paltsev
DW SDIO controller has external CIU clock divider controlled via register in the SDIO IP. Due to its unexpected default value (we expected it to divide by 1 but in reality it divides by 8) SDIO IP uses wrong CIU clock (it should be 100000000Hz but actual is 12500000Hz) and works unstable (see STAR 9001204800). So increase SDIO CIU frequency from actual 12500000Hz to 50000000Hz by switching from the default divisor value (div-by-8) to the minimum possible value of the divisor (div-by-2) in HSDK platform code. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-10ARC: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIOEugeniy Paltsev
With CONFIG_CMD_GPIO compilation reports error: -------------------------->8--------------------- common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include <asm/gpio.h> ^ -------------------------->8--------------------- Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2017-12-09ARM: socfpga: remove unneeded CONFIG_SYS_NAND_USE_FLASH_BBTMasahiro Yamada
Neither denali.c nor denali_spl.c references this option. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-09ARM: socfpga: remove unused CONFIG_NAND_DENALI_ECC_SIZEMasahiro Yamada
This option is no longer used. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-12-09usb: r8a66597: convert wait loop to readw_poll_timeoutChris Brandt
It is better to use an existing wait loop implementation. Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
2017-12-09ARM: rmobile: Add R8A77995 D3 Draak boardMarek Vasut
Add bits to support yet another board, the R8A77995 D3 Draak. The DT file is from Linux 4.15-rc1 , commit b35334447513c14a4dd55a67c269a743d4a4824b . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77970 V3M Eagle boardMarek Vasut
Add bits to support yet another board, the R8A77970 V3M Eagle. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09net: ravb: Add R8A77995 D3 compatibleMarek Vasut
Add new compatible to the Ethernet AVB driver for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09net: ravb: Add R8A77970 V3M compatibleMarek Vasut
Add new compatible to the Ethernet AVB driver for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09mmc: uniphier-sd: Add R8A77995 D3 compatibleMarek Vasut
Add new compatible to the Uniphier SD driver for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09mmc: uniphier-sd: Add R8A77970 V3M compatibleMarek Vasut
Add new compatible to the Uniphier SD driver for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09gpio: rmobile: Add generic Gen3 compatibleMarek Vasut
Add generic compatible to the GPIO driver for Gen3 SoCs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09gpio: rmobile: Add R8A77995 D3 compatibleMarek Vasut
Add new compatible to the GPIO driver for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09gpio: rmobile: Add R8A77970 V3M compatibleMarek Vasut
Add new compatible to the GPIO driver for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09pinctrl: rmobile: Add R8A77995 D3 PFC tablesMarek Vasut
Add PFC tables for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09pinctrl: rmobile: Add R8A77970 V3M PFC tablesMarek Vasut
Add PFC tables for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09clk: rmobile: Add R8A77995 D3 clock tablesMarek Vasut
Add clock tables for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09clk: rmobile: Add R8A77970 V3M clock tablesMarek Vasut
Add clock tables for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77995 SoCMarek Vasut
Add bits to support yet another SoC, the R8A77995 D3 . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09ARM: rmobile: Add R8A77970 SoCMarek Vasut
Add bits to support yet another SoC, the R8A77970 V3M . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-09clk: rmobile: Fix typo in R8A7796 RPC clock table entryMarek Vasut
Fix a copy-paste typo in the clock table entry, s/7795/7796/. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2017-12-08Merge git://git.denx.de/u-boot-mpc85xxTom Rini
2017-12-08Merge git://git.denx.de/u-boot-rockchipTom Rini
2017-12-08rockchip: rk3399-puma: preserve leading zeros in serial#Jakob Unterwurzacher
Linux preserves leading zeros in /proc/cpuinfo, so we should as well. Otherwise we have the situation that /sys/firmware/devicetree/base/serial-number and /proc/cpuinfo disagree in Linux. Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-08sunxi: Add the TBS A711 tabletMaxime Ripard
The TBS Tablet sports an LVDS display, an eMMC, an external SD, USB devices and USB OTG. Reviewed-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-12-07Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-12-07armv8: fix gd after relocationYork Sun
Commit 21f4486faa5d ("armv8: update gd after relocate") sets x18 without checking the return value of spl_relocate_stack_gd(). Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: York Sun <york.sun@nxp.com> CC: Kever Yang <kever.yang@rock-chips.com> CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2017-12-07log: Add documentationSimon Glass
Add documentation for the log system. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07log: test: Add a pytest for loggingSimon Glass
Add a test which tries out various filters and options to make sure that logging works as expected. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07log: sandbox: Enable loggingSimon Glass
Enable all logging features on sandbox so that the tests can be run. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07log: Plumb logging into the init sequenceSimon Glass
Set up logging both before and after relocation. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07log: Add a test commandSimon Glass
Add a command which exercises the logging system. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07log: Add a 'log level' commandSimon Glass
Add a command for adjusting the log level. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07log: Add a console driverSimon Glass
It is useful to display log messages on the console. Add a simple driver to handle this. Note that this driver outputs to the console, which may be serial or video. It does not specifically select serial output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07log: Add an implementation of loggingSimon Glass
Add the logging header file and implementation with some configuration options to control it. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07Drop the log bufferSimon Glass
This does not appear to be used by any boards. Before introducing a new log system, remove this old one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07usb: Correct use of debug()Simon Glass
With clang this gives a warning because hubsts appears to be used before it is set, even if ultimately it is not used. Simplify the code to avoid this problem. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-12-07mtdparts: Correct use of debug()Simon Glass
The debug() macro now evaluates its expression so does not need #ifdef protection. In fact the current code causes a warning with the new log implementation. Adjust the code to fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07Move debug and logging support to a separate headerSimon Glass
Before adding new features, move these definitions to a separate header to avoid further cluttering common.h. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2017-12-07Revert "sandbox: Drop special case console code for sandbox"Simon Glass
While sandbox works OK without the special-case code, it does result in console output being stored in the pre-console buffer while sandbox starts up. If there is a crash or a problem then there is no indication of what is going on. For ease of debugging it seems better to revert this change also. This reverts commit d8c6fb8cedbc35eee27730a7fa544e499b3c81cc. Signed-off-by: Simon Glass <sjg@chromium.org>