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2016-01-13hash.c: Conditionally compile hash_command, static hash_showTom Rini
The function hash_show is now only called by hash_command, so mark it as static (and drop from hash.h). We only call hash_command when any of CONFIG_CMD_CRC32, CONFIG_CMD_SHA1SUM or CONFIG_CMD_HASH are set. Since hash.c is linked in unconditionally we must take extra care with functions that bring in read-only strings as these will not be discarded. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-13part_dos.c: Don't wrap to negative after 2G sectorsStefan Monnier
In order to support large IDE disks we need to make certain types be lbaint_t now. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Stefan Monnier <monnier@iro.umontreal.ca>
2016-01-13image: check "bootm_low" and "bootm_size" if "initrd_high" is missingMasahiro Yamada
To boot Linux, we should prevent Initramdisk and FDT from going too high. Currently, boot_relocate_fdt() checks "fdt_high" environment first, and then falls back to getenv_bootm_mapsize() + getenv_bootm_low() if "fdt_high" is missing. On the other hand, boot_ramdisk_high() only checks "initrd_high" to get the address limit for the Initramdisk. We also want to let this case fall back to getenv_bootm_mapsize() + getenv_bootm_low(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-01-13dm: core: Add a new api to get indexed device addressMugunthan V N
Add new api to get device address based on index. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Acked-by: Jagan Teki <jteki@openedev.com> [Rebased on master] Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13power: pmic.h: Drop include <spi.h>Jagan Teki
include/power/pmic.h never used any generic spi code from include/spi.h, but this has been added in below commit. "dm: pmic: add implementation of driver model pmic uclass" (sha1: 4d9057e82be11a862db411c4867e859fe0d4ca2a) Adding functionalities in include/spi.h will trigger a build issue as this been added used in include/power/pmic.h Build issue on trats2 with adding BIT macro on spi.h: ---------------------------------------------------- CC lib/asm-offsets.s In file included from include/power/pmic.h:15:0, from include/power/max77686_pmic.h:11, from include/configs/trats2.h:212, from include/config.h:5, from include/common.h:18, from lib/asm-offsets.c:15: include/spi.h: In function 'spi_w8r8': include/spi.h:327:2: warning: implicit declaration of function 'BIT' [-Wimplicit-function-declaration] Cc: Simon Glass <sjg@chromium.org> Cc: Przemyslaw Marczak <p.marczak@samsung.com> Reported-by: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
2016-01-13defconfig: am437x_sk_evm: enable spi driver modelMugunthan V N
enable spi driver model for am437x_sk_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: am4372: add qspi register maps for memory mapMugunthan V N
Add qspi memory map address to device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13am43xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for splMugunthan V N
Since OMAP's spl doesn't support DM currently, do not define DM_SPI and DM_SPI_FLASH for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13defconfig: dra74_evm: enable spi driver modelMugunthan V N
enable spi driver model for dra74_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13defconfig: dra72_evm: enable spi driver modelMugunthan V N
enable mmc driver model for dra72_evm as ti_qspi supports driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: dra72-evm: add spi-flash comaptible for flashMugunthan V N
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: dra7-evm: add spi-flash comaptible for flashMugunthan V N
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: am437x-gp-evm: add spi-flash comaptible for flashMugunthan V N
In U-Boot most flashes uses "spi-flash" as compatible to bind the device to flash driver, so adding "spi-flash" compatible to m25p80 node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: dts: dra7: add qspi register maps for memory map and control moduleMugunthan V N
Add qspi memory map and control module register maps to device tree. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13drivers: spi: ti_qspi: convert driver to adopt device driver modelMugunthan V N
adopt ti_qspi driver to device driver model Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13dts: dra7: add spi alias for qspiMugunthan V N
add spi alias for qspi so that spi probes the device and driver successfully. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13dra7xx_evm: qspi: do not define DM_SPI and DM_SPI_FLASH for splMugunthan V N
Since OMAP's spl doesn't support DM currently, do not define DM_SPI and DM_SPI_FLASH for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Add support for dual and quad modeMugunthan V N
spi bus can support dual and quad wire data transfers for tx and rx. So defining dual and quad modes for both tx and rx. Also add support to parse bus width used for spi tx and rx transfers. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13drivers: spi: ti_qspi: prepare driver for DM conversionMugunthan V N
Prepare driver for DM conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13drivers: spi:ti_qspi: change ti_qspi_slave to ti_qspi_priv for driver model ↵Mugunthan V N
conversion Changing the ti_qspi_priv structure and its instance names from to priv for driver mode conversion. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13drivers: spi: ti_qspi: do not hard code chip select for memory map configurationMugunthan V N
To enable memory map in dra7xx, specific chip select must be written to control module register. But this hard coded to chip select 1, fixing it by writing the specific chip select value to control module register. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Add SPI_TX_DUAL modeJagan Teki
Added SPI_TX_DUAL mode flag. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Make IO modes at last in read modesJagan Teki
SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Minor cleanupJagan Teki
- Add comments on mode_rx - Tab space's Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Use BIT macroJagan Teki
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Fix bit assignment with flagsJagan Teki
Fixed bit assignment with flags members on spi_slave{} Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Move flags macro's to spi_slave{} membersJagan Teki
This patch moves flags macro's to respective member position on spi_slave{}, for better readabilty and finding the respective member macro's easily. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Rename op_mode_rx to mode_rxJagan Teki
Since spi rx mode macro's are renamed to simple and meaninfull, this patch will rename the respective structure members. Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Rename SPI_OPM_RX_* to SPI_RX_*Jagan Teki
SPI_OPM_RX_AS - SPI_RX_SLOW SPI_OPM_RX_AF - SPI_RX_FAST SPI_OPM_RX_DOUT - SPI_RX_DUAL SPI_OPM_RX_QOF - SPI_RX_QUAD Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Remove SPI_OPM_RX_DIO|QIOFJagan Teki
SPI_OPM_RX_DIO and SPI_OPM_RX_QIOF are rx IO commands/opmodes for dual and quad. Usually IO operation's are referred to flash protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Remove SPI_OPM_RX_EXTNJagan Teki
SPI_OPM_RX_EXTN is a combination of all rx opmode's and spi driver shall use any one of the rx mode at a time not the combination and it is true in case of flash where spi_flash_table mention combination of supported read opmodes so-that the required one will pick based on the rx mode from spi driver. Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Write quad bit along with read statusJagan Teki
While setting quad bit on spansion, macronix code is writing only particular quad bit this may give wrong functionality with other register bits, So this patch fix the issue where it with write previous read reg status along particular quad bit. Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Read back and check once macronix quad bit setJagan Teki
One macronix quad bit set using SR, it's good to read back and check the written bit and also if it's already been set check for the bit and return. Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Read back and check once spansion quad bit setJagan Teki
One spansion quad bit set using CR, it's good to read back and check the written bit and also if it's already been set check for the bit and return. Cc: Vignesh R <vigneshr@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Fix quad bit set for micron devicesJagan Teki
Setting up quad bit for micron devices need to do the same way as other flash devices like spansion, winbond etc does using enhanced volatile config register so this patch adds this support instead of printing "QEB is volatile" Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Peter Pan <peterpandong@micron.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Use BIT macroJagan Teki
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Minor cleanupJagan Teki
- Tab space - Place all read commands at one place. - Re-arrange write commands. Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Remove spi_flash_removeJagan Teki
Use direct call to device_remove instead of exctra spi_flash_remove defination. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Rename bank_end to bar_end in read_barJagan Teki
bar_end gives more meaningfull compared to bank_end and spi_flash_write_bar uses bar_end so replaced bank_end with bar_end in spi_flash_read_bar Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Rename spi_flash_set_* functionsJagan Teki
Since quad_mode functions are local to spi flash core, rename them to a meaningful and readable names. Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Move spi_read_cmds_array locallyJagan Teki
Since spi_read_cmds_array is used locally in spi_flash_scan, so move array to locally used function instead of defining global array. Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Rename SPI_TX_BP|QPP to SPI_TX_BYTE|QUADJagan Teki
Since SPI_TX_* are spi_slave{} members so use spi protocol notation instead spi flash programming, like SPI_TX_BP => SPI_TX_BYTE SPI_TX_QPP => SPI_TX_QUAD Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: Use mode instead of op_mode_txJagan Teki
Used mode member from spi_slave{} instead of op_mode_tx. Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13spi: make mode visible to both dm and non-dmJagan Teki
Couldn't find the exact reason to define 'mode' for dm, probably it is not using in non-dm drivers but it need to visible both dm and non-dm as mode data is getting dereferred in spi flash core ie common to both. Cc: Simon Glass <sjg@chromium.org> Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13sf: Get spi locally from spi_flashJagan Teki
For better code readabilty, get the spi pointer from spi_flash{} locally and use it instead of direct dereferring spi pinter as flash->spi->* Tested-by: Jagan Teki <jteki@openedev.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
2016-01-13arm: socfpga: Enable SPL_DM_SEQ_ALIAS for all SOCFPGA configsNathan Rossi
This feature is required in SPL to enable support for loading from SPI flash. Also clean up the #define in socfpga_common.h. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Stefan Roese <sr@denx.de> Acked: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin-Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13arm: mvebu: Select SPL_DM_SEQ_ALIASNathan Rossi
Select SPL_DM_SEQ_ALIAS which is required for certain uclasses, specifically SPI Flash. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Stefan Roese <sr@denx.de> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13arm: zynq: Enable SPL_DM_SEQ_ALIAS for all Zynq configsNathan Rossi
This feature is required in SPL to enable support for loading from SPI flash when the device is booted from QSPI. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13spl: dm: Add SPL_DM_SEQ_ALIAS config optionNathan Rossi
The Device Model sequence alias feature is required by some Uclasses. Instead of disabling the feature for all SPL targets allow it to be configured. The config option is disabled by default to reduce code size for targets that are not interested or do not require this feature. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Marek Vasut <marex@denx.de> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2016-01-13x86: qemu: add documentaion for the fw_cfg interfaceMiao Yan
Document the usage of 'qfw' command Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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