Age | Commit message (Expand) | Author |
2016-03-21 | arm64: Fix layerscape mmu setup | Alexander Graf |
2016-03-15 | arm64: Only allow dcache disabled in SPL builds | Alexander Graf |
2016-03-15 | arm64: Remove non-full-va map code | Alexander Graf |
2016-03-15 | thunderx: Move mmu table into board file | Alexander Graf |
2016-03-15 | arm64: Make full va map code more dynamic | Alexander Graf |
2016-03-15 | arm64: Disable TTBR1 maps in EL1 | Alexander Graf |
2016-03-15 | thunderx: Calculate TCR dynamically | Alexander Graf |
2016-01-19 | armv8: New MMU setup code allowing to use 48+ bits PA/VA | Sergey Temerkhanov |
2015-11-30 | armv8/layerscape: Update MMU table with execute-never bits | Alison Wang |
2015-11-10 | armv8: allow custom MMU setup routines on ARMv8 | Stephen Warren |
2015-10-15 | armv8/mmu: Set bits marked RES1 in TCR | Thierry Reding |
2015-09-01 | armv8: fsl-lsch3: Rewrite MMU translation table entries | Alison Wang |
2015-08-12 | ARM: cache: implement a default weak flush_cache() function | Wu, Josh |
2015-08-12 | ARM: cache: add an empty stub function for invalidate/flush dcache | Wu, Josh |
2015-07-31 | armv8: caches: Added routine to set non cacheable region | Siva Durga Prasad Paladugu |
2015-07-28 | armv8/cache: Fix page table creation | Thierry Reding |
2015-02-24 | armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack | York Sun |
2014-07-03 | ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC | York Sun |
2014-07-03 | ARMv8: Adjust MMU setup | York Sun |
2014-04-07 | armv8/cache: Change cache invalidate and flush function | York Sun |
2014-04-07 | armv8/cache: Consolidate setting for MAIR and TCR | York Sun |
2014-01-09 | arm64: core support | David Feng |