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path: root/arch/arm/dts/fsl-lx2160a.dtsi
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2020-09-24arm: dts: lx2160a: Add IO rangeWasim Khan
Add IO range property to fix below error on uboot PCI: Failed autoconfig bar 18 Signed-off-by: Wasim Khan <wasim.khan@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24armv8: dts: fsl-lx2160a: add gpio0 gpio1 gpio3 DT nodeshui.song
add gpio0 gpio1 gpio3 DT nodes to fsl-lx21600.dtsi Signed-off-by: hui.song <hui.song_1@nxp.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24arm64: Layerscape: Survive LPI one-way reset workaroundHou Zhiqiang
The workaround of LPI one-way reset issue is broken by the series: https://patchwork.ozlabs.org/project/uboot/list/?series=192398 This patch is to add DT node for GIC RD tables and create corresponding reserved-memory node in kernel DT to fix it. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27arm64: lx2160a: dts: Add watchdog nodeZhao Qiang
Add watchdog node which is sbsa into lx2160a dtsi Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-07-27arm: dts: lx2160a: Increase configuration window sizeWasim Khan
lx2160a rev2 requires 4KB space for type0 and 4KB space for type1 iATU window. Increase configuration size to 8KB to have sufficient space for type0 and type1 window. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-19arm: dts: lx2160a: add noted for dpmacs 1, 2, 5-6Ioana Ciornei
Add nodes for DPMACs 1, 2 and 5-6 which were missing from the description. These will be later used on the LX2160AQDS specific DTS. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-05-17dts: nxp2160ardb: add op-tee nodeIlias Apalodimas
A defconfig is added on lx2160ardb which allows UEFI variable management via OP-TEE. Enable the the node in the relevant DTS file. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-04-29arm: dts: lx2160ardb: add DPMAC and PHY nodesIoana Ciornei
In order to maintain compatibility with the Linux DTS, the entire fsl-mc node is added but instead of being probed by a dedicated bus driver it will be a simple-mfd. Also, annotate the EMDIO1 node and describe the 2 AR8035 RGMII PHYs and the 2 AQR107 PHYs. Also, add phy-handles for the dpmacs to their associated PHY. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-29arm: dts: lx2160a: add external MDIO nodesIoana Ciornei
Add the External MDIO device nodes found in the WRIOP global memory region. This is needed for management of external PHYs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-02-04arm: dts: lx2160a: Add FSPI node propertiesKuldeep Singh
Align flexspi node properties with linux device-tree properties Tested on LX2160A-RDB Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-12-26arm64: lx2160a: dts: Fix UART node statusVabhav Sharma
LX2160A PL011 UART driver fetch IP block values using platform data from board file instead of device tree. Modified UART nodes in device tree to disable state. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-08-22armv8: dts: fsl-lx2160a: add i2c controller and gpio DT nodesChuanhua Han
In lx2160a soc, there are eight i2c controllers, this patch adds i2c nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller depends. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-05-22armv8: lx2160a: add PCIe controller DT nodesHou Zhiqiang
The LX2160A integrated 6 PCIe Gen4 controllers. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2019-02-19armv8: lx2160ardb : Add support for LX2160ARDB platformPriyanka Jain
LX2160ARDB is an evaluation board that supports LX2160A family SoCs. This patch add base support for this board. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Pankit Garg <pankit.garg@nxp.com> Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Peng Ma <peng.ma@nxp.com> Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> [PK: Sqaush patches from Yinbo Zhu, Peng Ma, Chuanhua Han and re-arrange defconfig] Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
2018-12-06armv8: lx2160a: Add LX2160A SoC SupportPriyanka Jain
LX2160A Soc is based on Layerscape Chassis Generation 3.2 architecture with features: 16 ARM v8 Cortex-A72 cores in 8 cluster, CCN508, SEC, 2 64-bit DDR4 memory controller, RGMII, 8 I2C controllers, 3 serdes modules, USB 3.0, SATA, 4 PL011 SBSA UARTs, 4 TZASC instances, etc. SoC personalites: LX2120A is SoC with Twelve 64-bit ARM v8 Cortex-A72 CPUs LX2080A is SoC with Eight 64-bit ARM v8 Cortex-A72 CPUs Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com> Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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