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2012-09-01omap4/5/am33xx: Make lowlevel_init available to all armv7 platformsTom Rini
Make the lowlevel_init function that these platforms have which just sets up the stack and calls a C function available to all armv7 platforms. As part of this we change some of the macros that are used to be more clear. Previously (except for am335x evm) we had been setting CONFIG_SYS_INIT_SP_ADDR to a series of new defines that are equivalent to simply referencing NON_SECURE_SRAM_END. On am335x evm we should have been doing this initially and do now. Cc: Sricharan R <r.sricharan@ti.com> Tested-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Correct MMC1, remove MMC2 supportTom Rini
- Correct the MMC1 base offset - Remove MMC2 (that area is reserved and not MMC2). - Add the real BOOT_DEVICE_MMC2 value Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01mxs: prefix register structs with 'mxs' prefixOtavio Salvador
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01mxs: prefix register acessor macros with 'mxs' prefixOtavio Salvador
As the register accessing mode is the same for all i.MXS SoCs we ought to use 'mxs' prefix intead of 'mx28'. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador
Most code can be shared between i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
2012-09-01MX28: extend print_cpuinfo() to use chip informationOtavio Salvador
The information now is gathered from HW_DIGCTL_CHIPID register and includes the chip modem and revision on the output. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2012-09-01arm : Atmel : add at91sam9x5ek board supportBo Shen
Add at91sam9x5ek board support, this board support the following SoCs AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35 Using at91sam9x5ek_nandflash to configure for the board Now only supports NAND with software ECC boot up Signed-off-by: Bo Shen <voice.shen@atmel.com> [move MAINTAINERS entry to right place] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2012-09-01DaVinci DA8xx: replace magic number for DDR speedLaurence Withers
Replace a magic number for the DDR2/mDDR PHY clock ID with a proper definition. In addition, don't request this clock ID on DA830 hardware, which does not have a DDR2/mDDR PHY (or associated PLL controller). Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
2012-09-01DaVinci DA850: UART2 clock ID comes from ASYNC3Laurence Withers
On the DA830, UART2's clock is derived from PLL controller 0 output 2. On the DA850, it is in the ASYNC3 group, and may be switched between PLL controller 0 or 1. Fix the definition of the ID to match. Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
2012-09-01DaVinci DA8xx: tidy up clock ID definitionLaurence Withers
Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in place, it is clear how to define new clock IDs, and how these map to the numbers presented in the technical reference manual. Signed-off-by: Laurence Withers <lwithers@guralp.com> Cc: Tom Rini <trini@ti.com> Cc: Prabhakar Lad <prabhakar.csengg@gmail.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Rework pinmux functionsTom Rini
- Move definition of the EEPROM contents to <asm/arch/sys_proto.h> - Make some defines a little less generic now. - Pinmux must be done by done by SPL now. - Create 3 pinmux functions, uart0, i2c0 and board. - Add pinmux specific to Starter Kit EVM for MMC now. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Add support for TI AM335x StarterKit EVMTom Rini
- Board requires gpio0 #7 to be set to power DDR3. - Board uses DDR3, add a way to determine which DDR type to call config_ddr with. - Both of the above require filling in the header structure early, move it into the data section. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and supportTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Correct and clean up ddr_regs structTom Rini
The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry. Correct this by documenting a missing register that will be used at some point in the future (when write leveling is supported). Further, the cmdNcs{force,delay} fields are undocumented and we have been setting them to zero, remove. Next, setting of the 'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the ddr_data entries, so program it there. Finally, comment on how we are configuring the DATA1 registers that correspond to the DATA0 (dt0) registers defined in the struct. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Do not touch 'ratio1' fieldsTom Rini
The various ratio1 fields are not documented in any of the documentation I can find. Removing these and testing has yielded success, so remove the code that sets them and move their locations into the reserved fields. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Rework config_io_ctrl slightlyTom Rini
This function sets a number of related registers to the same value (the registers in question all have the same field descriptions and are related in operation). Rather than defining a struct and setting the value repeatedly, just pass in the value. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Use emif_regs struct for storing initialization valuesTom Rini
Rather than defining our own structs to note what to use when programming the EMIF and related re-use the emif_regs struct. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Turn a number of 'int' functions to 'void'Tom Rini
A number of memory initalization functions were int and always returned 0. Further it's not feasible to be doing error checking here, so simply turn them into void functions. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Document what we're doing with ddrctrl->ddrckectrlTom Rini
- Remove the call to set ddrctrl->ddrioctrl as it's all zeros. - Comment what we're really setting in ddrctrl->ddrckectrl which is that we're operating in the normal mode where EMIF/PHY clock is controlled by the PHY. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am335x: ddr_defs: Update EMIF parametersVaibhav Bedia
EMIF parameters are calculated based on the AC timing parameters from the SDRAM datasheet and the DDR frequency. Current values for these paramters in AM335x U-Boot code, though reliable, are not fully optimal. The most optimal settings can be derived based on the guidelines published at [1]. A pre-computed set of values with the most optimum settings for AM335x EVM and BeagleBone can be found at [2]. [1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips [2] http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#AM335x Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Clean up unused DDR defines, prefix more with 'DDR2'Tom Rini
- Remove a handful of unused defines. - Prefix more values with 'DDR2' as DDR3 will require different values. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Move the call to ddr_pll_config, make it take the frequencyTom Rini
Depending on if we have DDR2 or DDR3 on the board we will need to call ddr_pll_config with a different value. This call can be delayed slightly to the point where we know which type of memory we have. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Pass to config_ddr the type of memory that is connectedTom Rini
We need to pass in the type of memory that is connected to the board. The only reliable way to do this is to know what type of board we are running on (which later will be knowable in s_init()). For now, pass in the value of DDR2. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Make config_cmd_ctrl / config_ddr_data take const structsTom Rini
Rework the EMIF4/DDR code slightly to setup the structs that config_cmd_ctrl and config_ddr_data take to be setup at compile time and mark them as const. This lets us simplify the calling path slightly as well as making it easier to deal with DDR3. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Convert to using <asm/emif.h> to describe the EMIFTom Rini
Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01am33xx: Remove DMM_BASE defineTom Rini
The am33xx does not have a DMM, so don't define the base. Signed-off-by: Tom Rini <trini@ti.com>
2012-09-01OMAP3: mem: Add Numonyx OneNAND 200MHz timing informationJavier Martinez Canillas
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
2012-09-01am33xx: pin mux defintions for CPSW switchChandan Nath
This patch adds pin mux settings for CPSW switch found on TI AM335X based boards (MII and RGMII modes). Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split pinmux into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01am33xx: CPSW init and definitionsChandan Nath
This patch adds platform-specific initialization for CPSW switch on TI AM33XX SoCs. Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split init out of original patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
2012-09-01arm/davinci/da850: add uart0 pinmuxMikhail Kshevetskiy
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
2012-09-01arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138Mikhail Kshevetskiy
follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Acked-by: Christian Riesch <christian.riesch@omicron.at> Tested-by: Christian Riesch <christian.riesch@omicron.at>
2012-09-01da850/omap-l138: Add MMC support for DA850/OMAP-L138Lad, Prabhakar
This patch adds support for MMC/SD on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
2012-09-01omap: am33xx: enable gpio supportSteve Sakoman
This patch uses the code in omap-common to support gpio modules 1-3 on am33xx based boards. It adds base address and register definitions, enables clocks to the modules, and enables building the common gpio code for CONFIG_AM33XX as well as CONFIG_OMAP Signed-off-by: Steve Sakoman <steve@sakoman.com>
2012-08-09global_data: unify global flag definesMike Frysinger
All the global flag defines are the same across all arches. So unify them in one place, and add a simple way for arches to extend for their needs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2012-07-31I2C: Move struct s3c24x0_i2c to a common place.Rajeshwari Shinde
struct s3c24x0_i2c is being moved to common local header file so that the same can be used by s3c series and exynos series SoCs. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31EXYNOS: PINMUX: Add pinmux support for I2CRajeshwari Shinde
This patch adds pinmux code for I2C. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31EXYNOS5: define EXYNOS5_I2C_SPACINGRajeshwari Shinde
This patch defined EXYNOS5_I2C_SPACING used to calculate I2C channel base address. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31EXYNOS: Add I2C base address.Rajeshwari Shinde
This patch adds the base address for I2C. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31EXYNOS: CLK: Add i2c clockRajeshwari Shinde
This adds i2c clock information for EXYNOS5. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
2012-07-31imx-common: add i2c.c for bus recovery supportTroy Kisky
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31i.mx53: add definition for I2C3_BASE_ADDRTroy Kisky
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-31i.mx: iomux-v3.h: move to imx-common include directoryTroy Kisky
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
2012-07-20mx6: Make pad name macro consistent with the datasheetAshok
Use the same name as defined in the datasheet. DSP_CLK -> DISP_CLK Signed-off-by: Ashok Kumar Reddy Kourla <ashokkourla2000@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
2012-07-18Merge branch 'next' of git://git.denx.de/u-boot-videoWolfgang Denk
* 'next' of git://git.denx.de/u-boot-video: ipu_common: Add ldb_clk for use in parenting the pixel clock ipu_common: Do not hardcode the ipu_clk frequency ipu_common: Rename MXC_CCM_BASE ipu_common: Let clk_ipu_enable/disable only run on MX51 and MX53 ipu_common: Only apply the erratum to MX51 video: Rename CONFIG_VIDEO_MX5 mx6: Allow mx6 to access the IPUv3 registers common lcd: minor coding style changes Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-11mxc_i2c: specify i2c base address in config fileTroy Kisky
The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2012-07-10mx6: Allow mx6 to access the IPUv3 registersFabio Estevam
Adjust the IPUv3 registers, so that the IPUv3 driver can be extended for mx6 as well. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2012-07-10Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk
* 'master' of git://git.denx.de/u-boot-arm: tegra: define fdt_load/fdt_high variables tegra: enable bootz command tegra: usb: Fix device enumeration problem of USB1 tegra: trimslice: set up serial flash pinmux tegra: add pin_mux_spi() board initialization function tegra: add GMC/GMD funcmux entry for SFLASH tegra: bootcmd: start USB only when needed tegra: bootcmd enhancements tegra: add enterrcm command tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG Add env vars describing U-Boot target board tegra: usb: fix wrong error check tegra: add ULPI on USB2 funcmux entry tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches tegra: Add Tamonten Evaluation Carrier support tegra: Use SD write-protect GPIO on Tamonten tegra: Implement gpio_early_init() on Tamonten tegra: Allow boards to perform early GPIO setup tegra: plutux: Add device tree support tegra: medcom: Add device tree support tegra: Rework Tamonten support beagle: add eeprom expansion board info for bct brettl4 Signed-off-by: Wolfgang Denk <wd@denx.de>
2012-07-09tegra: usb: Fix device enumeration problem of USB1Jim Lin
A known hardware issue of USB1 port where bit 1 (connect status change) of PORTSC register will be set after issuing Port Reset (like "usb reset" in u-boot command line). This will be treated as an error and stops later device enumeration. Therefore we clear that bit after Port Reset in order to proceed later device enumeration. Signed-off-by: Jim Lin <jilin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
2012-07-09tegra: add GMC/GMD funcmux entry for SFLASHStephen Warren
This is used on TrimSlice. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit (git 2.34.1) at 2024-12-29 12:26:09 +0000