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path: root/arch/arm/mach-imx
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2019-10-08imx8m: restructure clock.hPeng Fan
i.MX8MQ and i.MX8MM use different analog pll design, but they share same ccm design. Add clock_imx8mq.h for i.MX8MQ keep common part in clock.h Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: rename clock to clock_imx8mqPeng Fan
i.MX8MQ and i.MX8MM has totally different pll design, so rename clock to clock_imx8mq. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: restrict reset_cpuPeng Fan
Make reset_cpu only visible when CONFIG_SYSRESET not defined or CONFIG_SPL_BUILD. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: soc: enable SCTR clock before timer initPeng Fan
To i.MX8MM SCTR clock is disabled by ROM, so before timer init need to enable it. To i.MX8MQ, it does not hurt the clock is enabled again. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: Configure trustzone region 0 for non-secure accessYe Li
Set trustzone region 0 to allow both non-secure and secure access when trust zone is enabled. We found USB controller fails to access DDR if the default region 0 is secure access only. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: Fix MMU table issue for OPTEE memoryPeng Fan
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE memory from its settings. So ARM speculative prefetch in u-boot may access that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory is set to secure access, then the speculative prefetch will fail and cause various memory issue in u-boot. The fail address register and int_status register in trustzone has logged that speculative access from u-boot. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add get_cpu_rev support for i.MX8MMPeng Fan
There are several variants based on i.MX8MM, add the support in get_cpu_rev Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: spl: add spl_board_boot_device for i.MX8MMPeng Fan
Differnet board has different controller used, it is hard to use one layout for them all. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add i.MX8MM cpu typePeng Fan
Add i.MX8MM cpu type and related helper functions Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add IMX8MM kconfig entryPeng Fan
Add IMX8MM kconfig entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add IMX8MQ kconfig entryPeng Fan
Add IMX8MQ kconfig entry, preparing support IMX8MM Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8m: add image cfg for i.MX8MM lpddr4Peng Fan
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then we could not reuse imximage.cfg, so create a new one. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: mkimage_fit_atf: Fix FIT image for correct boot orderFrieder Schrempf
Fix the FIT image metadata for i.MX8 to result in the intended boot order (SPL -> ATF -> U-Boot). Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08ARM: imx: arch/arm/mach-imx/spl_qspi.cfgStefan Roese
Similar to "spl_sd.cfg", this patch introduces "spl_qspi.cfg" so that all i.MX6 based boards can use it, when they use SPL and QSPI boot mode. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
2019-10-08ARM: imx: Add QSPI boot mode for i.MX6UL/ULLStefan Roese
This patch adds the missing boot mode detection for QSPI boot on i.MX6UL/ULL. Without it, booting with SPL from QSPI NOR does not work. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
2019-10-08imx: Kconfig: Reduce default CONFIG_CSF_SIZEBreno Matheus Lima
The default CSF_SIZE defined in Kconfig is too high and SPL cannot fit into the OCRAM in certain cases. The CSF cannot achieve 0x2000 length when using RSA 4K key which is the largest key size supported by HABv4. According to AN12056 "Encrypted Boot on HABv4 and CAAM Enabled Devices" it's recommended to pad CSF binary to 0x2000 and append DEK blob to deploy encrypted boot images. As the maximum DEK blob size is 0x58 we can reduce CSF_SIZE to 0x2060 which should cover both CSF and DEK blob length. Update default_image.c and image.c to align with this change and avoid a U-Boot proper authentication failure in HAB closed devices: Authenticate image from DDR location 0x877fffc0... bad magic magic=0x32 length=0x6131 version=0x38 bad length magic=0x32 length=0x6131 version=0x38 bad version magic=0x32 length=0x6131 version=0x38 spl: ERROR: image authentication fail Fixes: 96d27fb218 (Revert "habv4: tools: Avoid hardcoded CSF size for SPL targets") Reported-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Breno Lima <breno.lima@nxp.com>
2019-10-08imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC boot on falcon modeLukasz Majewski
This change tries to fix the following problem: - The board boots (to be more precise - ROM loads SPL) from a slow SPI-NOR memory. As a result the spl_boot_device() will return SPI-NOR as a boot device (which is correct). - The problem is that in 'falcon boot' the eMMC is used as a boot medium to load kernel from its partition. Calling spl_boot_device() will break things as it returns SPI-NOR device. To fix this issue the new CONFIG_SPL_FORCE_MMC_BOOT Kconfig flag is introduced to handle this special use case. By default it is not defined, so there is no change in the legacy code flow. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08DM: SPI: Convert display5 to use SPI with DM/DTS (but no in SPL)Lukasz Majewski
The DM/DTS support for SPI is disabled on purpose for SPL, as it is not supported as of time of this conversion. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08DM: eth: Switch display5 board to use DM_ETHLukasz Majewski
After this commit the display5 device would use FEC driver supporting driver model (DM_ETH). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08DM: mmc: Switch display5 board to use DM_MMC and BLK (USDHC)Lukasz Majewski
After this commit the display5 device would use eMMC driver supporting driver model (DM_MMC and BLK). Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08DM: I2C: Switch display5 board to use DM_I2CLukasz Majewski
After this commit the display5 device would use I2C driver supporting driver model (DM_I2C). The 'i2c' and 'eeprom' commands now use DM I2C drivers and initialize on-bus devices according to device tree description. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08pico-imx6: Add initial supportFabio Estevam
Add the initial support for the pico-imx6 variants. DDR initialization is based on the TechNexion's U-Boot code. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08mx6: clock: Allow enable_ipu_clock() to be built for SPL codeFabio Estevam
Allow enable_ipu_clock() to be built for SPL code. This is done in preparation for configuring the NoC registers on i.MX6QP in SPL. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2019-10-08imx8: cpu: fix mac fuse word for i.MX8QMPeng Fan
i.MX8QM does not share same FUSE MAC word index, so update the word index for i.MX8QM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: move i.MX8 cpu desc code to drivers/cpu/imx8_cpu.cPeng Fan
Move cpu desc code to cpu driver directory and name it imx8_cpu.c No functional change. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: fdt: add optee nodePeng Fan
Add OP-TEE device tree node for Linux according to args passed from ATF. If ATF has been built with OP-TEE running, boot_pointer[1] will indicate that. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: save args passed from ATFPeng Fan
We use information from ATF to know whether OP-TEE is running or not. So save args passed from ATF. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: fdt: configure sid for mastersPeng Fan
On i.MX8QM, sid is programmable, so we could program sid according the value encoded in device tree. This patch support legacy bindings which are still being used by XEN and new bindings used by Linux Kernel. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: disable node when the resource is not ownedPeng Fan
When resource is not assigned to non-secure Linux, if linux continue to use the node, linux may crash or hang. So need to set the node status to disabled for not owned resources. The resource id is in the power-domains property in device tree, so parse the power-domains property to get the resource id and use scfw api to check whether it is owned by current partition. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8qm: power up SMMUPeng Fan
There is SMMU in i.MX8QM. To use SMMU in Linux, need power up it. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: Probe the SCU driver by using uclass functionYe Li
Since SCU MU driver has been bound in dm_init, so we don't need to bind it again. Just replace by using uclass function to probe it. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: add container targetPeng Fan
To support SPL loading container file, add a new Makefile target, and introduce a new Kconfig file to source the cfg file which will be parsed by mkimage. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx8: support parsing i.MX8 Container filePeng Fan
Add parsing i.MX8 Container file support, this is to let SPL could load images in a container file to destination address. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08Kconfig: Migrate CONFIG_CSF_SIZE to KconfigBreno Matheus Lima
Move CONFIG_CSF_SIZE to Kconfig and define default value as 0x4000. mx8mqevk requires 0x2000 add this configuration in imx8mq_evk_defconfig file. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-10-08i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXTYe Li
On i.MX7ULP B0, there is change in NIC clock dividers architecture. On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but on B0 they are parallel with NIC1 DIV. So now the dividers are independent. This patch modifies the scg_nic_get_rate function according to this change. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Set A7 core frequency to 500Mhz for B0 chipYe Li
The normal target frequency for ULP A7 core is 500Mhz, but now ROM set the core frequency to 413Mhz. So change it to 500Mhz in u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Add CPU revision check for B0Peng Fan
Since there is no register for CPU revision, we use ROM version to check the A0 or B0 chip. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Workaround APLL PFD2 to 345.6MhzYe Li
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem. The correct fix should let GPU handle the clock rate in kernel. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix SPLL/APLL clock rate calculation issueYe Li
The num/denom is a float value, but in the calculation it is convert to integer 0, and cause the result wrong. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix wrong i2c configuration nameYe Li
Wrong I2c driver configuration name is used in codes, so I2c driver is not built. Correct it. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Add CONFIG_MX7ULP to kconfigYe Li
Since many drivers need this CONFIG_MX7ULP to distiguish the settings for i.MX7ULP only. Add this entry to cpu's kconfig. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Correct the clock indexBai Ping
On i.MX7ULP, value zero is reserved in SCG1 RCCR register, so the val should be decreased by 1 to get the correct clock source index. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08i.MX7ULP: Fix system reset after a7 rtc alarm expired.Bai Ping
The board will reboot if A7 core enter mem mode by rtc, then M4 core enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode to fix this issue. Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access it. So check the CPU rev and not apply the settings for B0. Signed-off-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: i.MX7ULP: add get_boot_devicePeng Fan
Add get_boot_device for i.MX7ULP Signed-off-by: Peng Fan <peng.fan@nxp.com> Tested-by: Fabio Estevam <festevam@gmail.com>
2019-10-08ARM: imx: Support larger SPL size on IMX6DQRobert Hancock
Previously the SPL size on all iMX6 platforms was restricted to 68KB because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the other iMX6 variants have 256KB of OCRAM. Add an option CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which don't need to support the SL/DL variants. This allows for an SPL size of 196KB, which makes it much easier to use configurations such as SPL with driver model and FDT control. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
2019-10-08spl: imx: only use HAB if spl fit signature is not enabledRicardo Salveti
There is no need to use HAB for FIT signature validation when SPL_FIT_SIGNATURE is also enabled, as that will be validated via the normal U-Boot signed FIT image flow. This allows having SPL validated by HAB and the payloads to follow being validated with FIT signatures only. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-08imx: apalis_imx6: select MX6Q via KconfigRicardo Salveti
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q variants, which are quite similar and already managed via only one dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in order to automatically enable the HAS_CAAM and MX6_SMP features. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2019-10-08imx: add i.MX6ULZ cpu typePeng Fan
Add i.MX6ULZ cpu type and helper. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-08-11env: Drop environment.h header file where not neededSimon Glass
This header file is now only used by files that access internal environment features. Drop it from various places where it is not needed. Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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