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2020-01-07ARM: mx6: ddr: Add support for iMX6SXMarek Vasut
This patch adds support for iMX6SX MMDC into the DDR calibration code. The only difference between MX6DQ and MX6SX is that the SX has 2 SDQS registers, while the DQ has 8. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07ARM: mx6: ddr: Configure all SDQS pullups using loopMarek Vasut
Instead of explicitly setting up each SDQS register, use a loop. No functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07ARM: mx6: ddr: Factor out SDQS configuration codeMarek Vasut
Pull out the code turning SDQS pullups on and off into a separate function, since it is replicated in two places in the code and it is the single place in the entire function which is SoC dependent. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07ARM: mx6: ddr: Make debug prints work with tiny printfMarek Vasut
The %08X format returns just zeroes with tiny printf, which is horribly confusing, especially when debugging DRAM calibration problems. Change the format to %08x (with lowercase x), which behaves correctly with either implementation of printf in SPL. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
2020-01-07imx: Add support for i.MX28 based XEA boardLukasz Majewski
This patch introduces support for i.MX28 based XEA board. This board supports DM/DTS in U-Boot proper as well as DM aware drivers in SPL (u-boot.sb) by using OF_PLATDATA. More detailed information regarding usage of it can be found in ./board/liebherr/xea/README file. U-Boot SPL 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200) Trying to boot from MMC1 MMC0: Command 8 timeout (status 0xf0344020) mmc_load_image_raw_sector: mmc block read error U-Boot 2019.10-rc1-00233-g6aa549f05c (Aug 12 2019 - 09:23:36 +0200) CPU: Freescale i.MX28 rev1.2 at 454 MHz BOOT: SSP SPI #3, master, 3V3 NOR Model: Liebherr (LWE) XEA i.MX28 Board DRAM: 128 MiB MMC: MXS MMC: 0 Loading Environment from SPI Flash... SF: Detected n25q128a13 with page size 256 Bytes, erase size 64 KiB, total 16 MiB OK In: serial Out: serial Err: serial Net: Warning: ethernet@800f0000 (eth0) using random MAC address - ce:e1:9e:46:f3:a2 eth0: ethernet@800f0000 Hit any key to stop autoboot: 0 Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-01-07imx6: aristainetos: add support for rev C boardHeiko Schocher
add support for revision C boards. This board has no longer a NAND. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07imx6: aristainetos: add aristainetos 2b cslHeiko Schocher
add aristainetso board version CSL. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07imx6: aristainetos: readd aristainetos 2b boardHeiko Schocher
readd aristainetos 2b board. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07imx6: aristainetos: add DM_SERIAL supportHeiko Schocher
add DM_SERIAL support for the aristainetos board, and remove not used code from board code. remove CONSOLE_OVERWRITE_ROUTINE. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07imx6: aristainetos: remove 2b versionHeiko Schocher
remove 2b version of aristainetos board, as it is easier to make the DM / DTS port and introduce the 2b board version again (also some more board version). Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07imx6: aristainetos: move defines to KconfigHeiko Schocher
move defines, which are already moved to Kconfig out of board config. Signed-off-by: Heiko Schocher <hs@denx.de>
2020-01-07imx6: remove aristainetos boardHeiko Schocher
remove not anymore used aristainetos board. Signed-off-by: Heiko Schocher <hs@denx.de>
2019-12-27ARM: i.MX6: TARGET_NITROGEN6X: add 'select MX6QDL'Troy Kisky
This fixes commit <91435cd40d30> "ARM: i.MX6: exclude the ARM errata from i.MX6 UP system" for nitrogen6x. The above commit removed the errata for the board since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS This restores the errata configs. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-12-27tools/imximage: share DCD information via KconfigJorge Ramirez-Ortiz
IMX based platforms can have the DCD table located on different addresses due to differences in their memory maps (ie iMX7ULP). This information is required by the user to sign the images for secure boot so continue making it accessible via mkimage. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-12-09Merge tag 'u-boot-imx-20191209' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx Fixes for 2020.01 ----------------- - imx8qxp_mek: increase buffer sizes and args number - Fixes for imx7ulp - imx8mm: Fix the first root clock in imx8mm_ahb_sels[] - colibri_imx7: reserve DDR memory for Cortex-M4 - vining2000: fixes and convert to ethernet DM - imx8m: fix rom version check to unbreak some B0 chips - tbs2910: Disable VxWorks image booting support
2019-12-09imx8m: fix rom version check to unbreak some B0 chipsPatrick Wildt
Recently the version check was improved to be able to determine that we're running on SoC revision 2.1. A check for B0 was tightened so that it now must equal 0x20 instead of being bigger than 0x20. On some B0 chips the value returned is 0x1020 instead of 0x20. This means even though it's B0, the check will fail and code relying on the correct chip revision will make wrong decisions. There is no documentation of those bits, but it seems that NXP always uses a byte to encode the revision. Thus remove the upper bits to fix the regression. Signed-off-by: Patrick Wildt <patrick@blueri.se>
2019-12-06ARM: imx: vining2000: Convert to SPL frameworkMarek Vasut
In preparation for use of DDR DRAM fine-tuning upon boot, convert the board to SPL framework instead of using DCD tables to bring up DRAM and pinmux. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Silvio Fricke <silvio.fricke@softing.com> Cc: Stefano Babic <sbabic@denx.de>
2019-12-06ARM: mx6: pmu: Expose PMU LDO configuration interfaceMarek Vasut
Make the PMU LDO configuration interface available to board code, so that board code can reconfigure the internal LDOs of the SoC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Eric Nelson <eric@nelint.com>
2019-12-06mx6: Allow configuring the NoC registers on i.MX6QPFabio Estevam
The NoC registers on i.MX6QP needs to be configured, otherwise some usecases in the kernel behave incorrectly, such as rotation and resize. Currently the NoC registers are not configured in the kernel, so configure them in U-Boot like it is done in the NXP U-Boot tree. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-12-06mx7ulp: scg: Remove unnused scg_a7_apll_init()Fabio Estevam
scg_a7_apll_init() is not called anywhere, so remove such dead code Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Remove the _RUN notation from the PMC1 LDOVL definitionsFabio Estevam
The LDOVL definitions is common to all the modes, not only RUN mode, so in order to avoid confusion, remove the _RUN notation from the PMC1 LDOVL definitions. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE optionFabio Estevam
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards designed to operate with LDO enabled mode can work with 0.95V at LDO output in RUN mode as per the datasheet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Print the LDO mode statusFabio Estevam
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode or LDO bypass mode. Print the LDO mode status in the U-Boot log for convenience. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-04cmd: nand/sf: isolate legacy codeMiquel Raynal
The 'sf' command is not supposed to rely on the MTD stack, but both 'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite their location, these functions do not depend at all on the MTD stack. This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is selected, which is inconsistent with the current situation. Solve this by moving these three functions (which are only used by the above two commands) out of mtd_uboot.c and put them in a C file only compiled with cmd/sf.c and cmd/nand.c. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Don't export get_part function now] Signed-off-by: Tom Rini <trini@konsulko.com>
2019-12-03mtd: rename CONFIG_NAND -> CONFIG_MTD_RAW_NANDMiquel Raynal
Add more clarity by changing the Kconfig entry name. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> [trini: Re-run migration, update a few more cases] Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
2019-12-02common: Move some board functions out of common.hSimon Glass
A number of board function belong in init.h with the others. Move them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some time functions out of common.hSimon Glass
These functions belong in time.h so move them over and add comments. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move older CPU functions to their own headerSimon Glass
These should be moved to driver model, but in the meantime, move them out of the common header to help reduce its size. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-05imx: imx8m: fix boot when CONFIG_$(SPL_)CLK not definedPeng Fan
When CONFIG_$(SPL_)CLK not defined, the clock controller device not exist, so to avoid boot failure for platform not have CONFIG_$(SPL_)CLK, add a check. Reviewed-by: Patrick Wildt <patrick@blueri.se> Tested-by: Patrick Wildt <patrick@blueri.se> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add i.MX8MN DDR4 board supportPeng Fan
Support pinctrl/clk/sdhc, include ddr4 timing data. Log: U-Boot SPL 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) Normal Boot Trying to boot from BOOTROM image offset 0x8000, pagesize 0x200, ivt offset 0x0 U-Boot 2019.10-rc3-00356-g497c500423-dirty (Sep 16 2019 - 10:54:58 +0800) CPU: Freescale i.MX8MNano rev1.0 at 24 MHz Reset cause: POR Model: NXP i.MX8MNano DDR4 EVK board DRAM: 2 GiB MMC: FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8m: add i.MX8MN ddr4 image cfg filePeng Fan
Add cfg file for i.MX8MN DDR4 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: add get_boot_devicePeng Fan
No ROM INFO structure on iMX8MN, use new ROM API to get boot device from ROM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: cpu: restrict get_boot_devicePeng Fan
i.MX8MN has its own get_boot_device, so restrict with i.MX8MQ and i.MX8MM. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add rom api supportPeng Fan
i.MX8MN support loading images with rom api, so we implement reuse board_return_to_bootrom to let ROM loading images. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: spl: use spl_board_boot_device for i.MX8MNPeng Fan
i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: set BYPASS ID SWAP to avoid AXI bus errorsPeng Fan
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to generated AXI bus errors with TZC380 enabled. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8m: add clk support for i.MX8MNPeng Fan
i.MX8MN has similar architecture with i.MX8MM, so it could reuse the clock code of i.MX8MM, but i.MX8MN has different CCM root configurations, so need a separate root entry. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx8mn: support get_cpu_revPeng Fan
Add a dummy cpu type and support get_cpu_rev for i.MX8MN Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05imx: add i.MX8MN kconfig entryPeng Fan
Add i.MX8MN kconfig entry Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx: nandbcb: add support for writing BCB onlyIgor Opaniuk
Add subcommand for add writing BCB only, where we provide appropriate offsets for firmware1 and firmware2 and size. Example of usage: > nandbcb bcbonly 0x00180000 0x00080000 0x00200000 Writing 1024 bytes to 0x0: randomizing OK Writing 1024 bytes to 0x20000: randomizing OK Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: nandbcb: refactor update functionIgor Opaniuk
Move code for writing FCB/DBBT pages to a separate function Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: nandbcb: add support for i.MX7Igor Opaniuk
Add support for updating FCB/DBBT on i.MX7: - additional new fields in FCB structure - Leverage hardware BCH/randomizer for writing FCB Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com> Tested-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-03imx: support i.MX8QM ROM 7720 a1 boardOliver Graute
Add i.MX8QM ROM 7720a1 board support Boot log as below: U-Boot 2019.10-rc3-00004-gd073e0242f (Sep 20 2019 - 08:24:13 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Advantech iMX8QM Qseven series Board: ROM-7720-A1 4GB Build: SCFW 65afe5f6 Boot: SD2 DRAM: 4 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 Net: eth0: ethernet@5b040000Could not get PHY for FEC1: addr 1 , eth-1: ethernet@5b050000 Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
2019-11-03board/BuR/brppt2: initial commitHannes Schmelzer
This commit adds support for the brppt2 board. The board is based on the i.mx6 dual-lite SoC. Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2019-11-03imx8: output SECO-FW and ATF commit IDsAnatolij Gustschin
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617) but drop imx-mkimage commit ID reading since we now use in tree mkimage. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03mach-imx: Adding new argument for SIP call interfaceYe Li
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ, so update the interface to add new argument. Signed-off-by: Ye Li <ye.li@nxp.com> [agust: fixed imx8m-power-domain build] Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Patrick Wildt <patrick@blueri.se> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx8: Add AHAB secure boot supportPeng Fan
Add function and new command "auth_cntr" for secure boot support. When booting with life cycle set to OEM closed, we need to use this function to authenticate the OS container and load kernel & FDT from OS container to their destination. Also add image authentication call when loading container images. Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not set at default. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-03imx: spl: implement spl_boot_mode for i.MX7/8/8MPeng Fan
It will be easy to separate SD/EMMC when booting in SPL stage, then no need to bother which device is BOOT_DEVICE_MMC1/2. Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2024-12-26 17:29:23 +0000