summaryrefslogtreecommitdiff
path: root/arch/arm/mach-k3/j721e_init.c
AgeCommit message (Collapse)Author
2020-08-11arm: mach-k3: j7200: Detect if ROM has already loaded sysfwLokesh Vutla
Detect if sysfw is already loaded by ROM and pass this information to sysfw loader. Based on this information sysfw loader either loads the sysfw image from boot media or just receives the boot notification message form sysfw. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: j7200: Add support for storing extended boot info from ROMLokesh Vutla
Starting J7200 SoC, ROM supports for loading sysfw directly from boot image. ROM passes this information on number of images that are loaded to bootloader at certain location. Add support for storing this information before it gets corrupted. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: j721e: Fix unlocking control module registersLokesh Vutla
In main control mmr there is no partition 4 and partition 6 is available only on J721e. Fix the same in ctrl_mmr_unlock function Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: j721e: Add detection for j721eLokesh Vutla
Add an api soc_is_j721e(), and use it to enable certain functionality that is available only on j721e. This detection is needed when DT is not available. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: sysfw-loader: Add support for rom loading sysfw imageLokesh Vutla
Starting J7200 SoC, ROM supports for loading sysfw directly from boot image. In such cases, SPL need not load sysfw from boot media, but need to receive boot notification message from sysfw. So separate out remoteproc calls for system controller from sysfw loader and just receive the boot notification if sysfw is already loaded. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11arm: mach-k3: Move mmr_unlock to a common locationLokesh Vutla
mmr_unlock api is common for all k3 devices. Move it to a common location. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
2020-08-11board: ti: j721e: Probe eeprom only when CONFIG_TI_I2C_BOARD_DETECT is definedLokesh Vutla
Guard all eeprom probe with TI_I2C_BOARD_DETECT to avoid reading eeprom when eeprom is not available Reviewed-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2020-05-25Merge tag 'ti-v2020.07-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti - Enable DM_ETH on omap3_logic board - Enable Caches in SPL for K3 platforms - Enable backup boot mode support for J721E - Update the DDR timings for AM654 EVM - Add automated tests for RX-51
2020-05-19arm: mach-k3: Enable dcache in SPLJan Kiszka
Add support for enabling dcache already in SPL. It accelerates the boot and resolves the risk to run into unaligned 64-bit accesses. Based on original patch by Lokesh Vulta. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-05-19arm: mach-k3: j721e_init: Add support for backup boot modesAndreas Dannenberg
When the boot of J721E devices using the primary bootmode (configured via device pins) fails a boot using the configured backup bootmode is attempted. To take advantage of the backup boot mode feature go ahead and add support to the J721E init code to determine whether the ROM code performed the boot using the primary or backup boot mode, and if booted from the backup boot mode, decode the bootmode settings into the appropriate U-Boot mode accordingly so that the boot can proceed. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2020-05-18common: Drop init.h from common headerSimon Glass
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-22spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()Harald Seiler
The function's name is misleading as one might think it is used generally to select the boot-mode when in reality it is only used by the MMC driver to find out in what way it should try reading U-Boot Proper from a device (either using a filesystem, a raw sector/partition, or an eMMC boot partition). Rename it to spl_mmc_boot_mode() to make it more obvious what this function is about. Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-17Merge tag 'ti-v2020.07-next' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next K3 J721E: * OSPI boot support * Support for loading remote cores in R5 SPL * PMIC ESM Support * Minor fixes for R5F and C7x remoteproc drivers K3 AM654: * Update AVS class 0 voltages. * Add I2C nodes DRA7xx/AM57xx: * Fixed Android boot on AM57xx AM33/AM43/Davinci: * switch to driver model for the net and mdio driver for baltos * Add DM/DTS support for omap video driver * Enable fastboot on am335x-evm
2020-03-11arm: mach-k3: Add a separate function for printing sysfw versionLokesh Vutla
Add a separate function for printing sysfw version so that it can be called independently of k3_sysfw_loader. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-09arm: K3: sysfw-loader: Add a config_pm_pre_callback()Faiz Abbas
System firmware does not guarantee that clocks going out of the device will be stable during power management configuration. There are some DCRC errors when SPL tries to get the next stage during eMMC boot after sysfw pm configuration. Therefore add a config_pm_pre_callback() to switch off the eMMC clock before power management and restart it after it is done. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03arm: k3: Add support for loading non linux remote coresKeerthy
Add MAIN domain R5FSS0 remoteproc support from spl. This enables loading the elf firmware in SPL and starting the remotecore. In order to start the core, there should be a file with path "/lib/firmware/j7-main-r5f0_0-fw" under filesystem of respective boot mode. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [Guard start_non_linux_remote_cores under CONFIG_FS_LOADER] Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2020-01-20arm: K3: Disable ROM configured firewallsAndrew F. Davis
ROM configures certain firewalls based on its usage, which includes the one in front of boot peripherals. In specific case of boot peripherals, ROM does not open up the full address space corresponding to the peripherals. Like in OSPI, ROM only configures the firewall region for 32 bit address space and mark 64bit address space flash regions as in-accessible. When security-cfg is initialized by sysfw, all the non-configured firewalls are kept in bypass state using a global setting. Since ROM configured firewalls for certain peripherals, these will not be touched. So when bootloader touches any of the address space that ROM marked as in-accessible, system raises a firewall exception causing boot hang. It would have been ideal if sysfw cleans up the ROM configured boot peripheral firewalls. Given the memory overhead to store this information provided by ROM and the boot time increase in re configuring the firewalls, it is concluded to clean this up in bootloaders. So disable all the firewalls that ROM doesn't open up the full address space. Signed-off-by: Andrew F. Davis <afd@ti.com> Signed-off-by: Venkateswara Rao Mandela <venkat.mandela@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-20board: ti: j721e: Use EEPROM-based board detectionAndreas Dannenberg
The TI J721E EVM system on module (SOM), the common processor board, and the associated daughtercards have on-board I2C-based EEPROMs containing board config data. Use the board detection infrastructure to do the following: 1) Parse the J721E SOM EEPROM and populate items like board name, board HW and SW revision as well as board serial number into the TI common EEPROM data structure residing in SRAM scratch space 2) Check for presence of daughter card(s) by probing associated I2C addresses used for on-board EEPROMs containing daughter card-specific data. If such a card is found, parse the EEPROM data such as for additional Ethernet MAC addresses and populate those into U-Boot accordingly 3) Dynamically apply daughter card DTB overlays to the U-Boot (proper) DTB during SPL execution 4) Dynamically create an U-Boot ENV variable called name_overlays during U-Boot execution containing a list of daugherboard-specific DTB overlays based on daughercards found to be used during Kernel boot. This patch adds support for the J721E system on module boards containing the actual SoC ("J721EX-PM2-SOM", accessed via CONFIG_EEPROM_CHIP_ADDRESS), the common processor board ("J7X-BASE-CPB"), the Quad-Port Ethernet Expansion Board ("J7X-VSC8514-ETH"), the infotainment board ("J7X-INFOTAN-EXP") as well as for the gateway/Ethernet switch/industrial expansion board ("J7X-GESI-EXP"). Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-01-03arm: mach-k3: Enable WA for R5F deadlockLokesh Vutla
On K3 devices there are 2 conditions where R5F can deadlock: 1.When software is performing series of store operations to cacheable write back/write allocate memory region and later on software execute barrier operation (DSB or DMB). R5F may hang at the barrier instruction. 2.When software is performing a mix of load and store operations within a tight loop and store operations are all writing to cacheable write back/write allocates memory regions, R5F may hang at one of the load instruction. To avoid the above two conditions disable linefill optimization inside Cortex R5F which will make R5F to only issue up to 2 cache line fills at any point of time. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-11-07arm: mach-k3: j721e_init: Initialize avs class 0Keerthy
Initialize avs class 0 Signed-off-by: Keerthy <j-keerthy@ti.com>
2019-10-25armv7R: K3: j721e: Add support for triggering ddr init from SPLLokesh Vutla
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Load SYSFW binary and config from boot mediaAndreas Dannenberg
Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the J721E early initialization sequence. While at it also initialize the MCU_UART0 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Shut down R5 core after ATF startup on A72Lokesh Vutla
Populate the release_resources_for_core_shutdown() api with shutting down r5 cores so that it will by called just after jumping to ATF. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-07-26armv7R: K3: j721e: Store boot index from ROMAndreas Dannenberg
Obtain the boot index as left behind by the device boot ROM and store it in scratch pad SRAM for later use before it may get overwritten. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv7R: K3: j721e: Unlock all applicable control MMR registersAndreas Dannenberg
To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MCU and MAIN domains. We may want to go back later and limit the unlocking that's being done. Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2019-07-26armv7R: K3: j721e: Add support for boot device detectionLokesh Vutla
J721E allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-07-26arm: K3: j721e: Add basic support for J721E SoC definitionLokesh Vutla
The J721E SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable lower system costs of automotive applications such as infotainment, cluster, premium Audio, Gateway, industrial and a range of broad market applications. This SoC is designed around reducing the system cost by eliminating the need of an external system MCU and is targeted towards ASIL-B/C certification/requirements in addition to allowing complex software and system use-cases. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, three clusters of lockstep capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA), C7x floating point Vector DSP, Two C66x floating point DSPs. * 3D GPU PowerVR Rogue 8XE GE8430 * Vision Processing Accelerator (VPAC) with image signal processor and Depth and Motion Processing Accelerator (DMPAC) * Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual PRUs and dual RTUs * Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and up to two DPI interfaces. * Integrated Ethernet switch supporting up to a total of 8 external ports in addition to legacy Ethernet switch of up to 2 ports. * System MMU (SMMU) Version 3.0 and advanced virtualisation capabilities. * Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems, 16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI, I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals. * Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS * Centralized System Controller for Security, Power, and Resource Management (DMSC) See J721E Technical Reference Manual (SPRUIL1, May 2019) for further details: http://www.ti.com/lit/pdf/spruil1 Add base support for J721E SoC Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com>