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2019-12-02common: Move some cache and MMU functions out of common.hSimon Glass
These functions belong in cpu_func.h. Another option would be cache.h but that code uses driver model and we have not moved these cache functions to use driver model. Since they are CPU-related it seems reasonable to put them here. Move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move some SMP functions out of common.hSimon Glass
These functions belong in cpu_func.h so move them over. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-07-24psci: Fix warnings when compiling with W=1Patrick Delaunay
This patch solves the following warnings: arch/arm/mach-stm32mp/psci.c: warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes] warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes] Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-10ARM: uniphier: de-couple SC macros into base address and offsetMasahiro Yamada
The SC_* macros represent the address of SysCtrl registers. For a planned new SoC, its base address will be changed. Turn the SC_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-07-10ARM: uniphier: de-couple SG macros into base address and offsetMasahiro Yamada
The SG_* macros represent the address of SoC-glue registers. For a planned new SoC, its base address will be changed. Turn the SG_* macros into the offset from the base address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-29ARM: uniphier: move sg_set_{pinsel, iectrl} to more relevant placesMasahiro Yamada
Move the sg_set_pinsel macro to arch/arm/mach-uniphier/arm32/debug_ll.S since it is not used anywhere else. Move the C functions sg_set_{pinsel,iectrl} to debug-uart.c since they are not used anywhere else. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-06-29ARM: uniphier: fix build error for CONFIG_DEBUG_LL=yMasahiro Yamada
Commit e27d6c7d328c ("ARM: uniphier: simplify SoC ID get function") accidentally removed the macros needed to compile debug_ll.S Revive them. Fixes: e27d6c7d328c ("ARM: uniphier: simplify SoC ID get function") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07uniphier: psci: save context id in cpu_on commandPatrick Delaunay
Replace the psci_save_target_pc call by the new function psci_save(cpu, pc,context_id) Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
2017-10-15ARM: uniphier: use pr_() instead of printf() where appropriateMasahiro Yamada
Replace printf() with pr_() to specify proper loglevel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-20Revert "ARM: uniphier: fix ROM boot mode for PH1-sLD3"Masahiro Yamada
This reverts commit 82d075e79fa509ffb8ecd8dd2dc216929d6e8289. Commit 82d075e79fa5 ("ARM: uniphier: fix ROM boot mode for PH1-sLD3") was a workaround for sLD3. Now the sLD3 SoC support has been removed. Revert it to allow to simplify the init code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-20Revert "ARM: uniphier: move lowlevel debug init code after page table switch"Masahiro Yamada
This reverts commit bcc51c1512a3deb6a9fdd37362c6dde32ad3da23. Commit bcc51c1512a3 ("ARM: uniphier: move lowlevel debug init code after page table switch") was intended to support lowlevel debug for sLD3. Now the sLD3 SoC support has been removed. Revert it to allow to enable lowlevel debug earlier. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-08-20ARM: uniphier: remove sLD3 SoC supportMasahiro Yamada
This SoC is too old. It is difficult to maintain any longer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-01-22ARM: uniphier: simplify SoC ID get functionMasahiro Yamada
Currently, uniphier_get_soc_type() converts the SoC ID (this is read from the revision register) to an enum symbol to use it for SoC identification. Come to think of it, there is no need for the conversion in the first place. Using the SoC ID from the register as-is a straightforward way. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-28ARM: uniphier: support system reset functionality for PSCIMasahiro Yamada
This supports the system reset via PSCI for ARMv7 SoCs. Because the system reset is not supported on PSCI 0.1, let's define CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there is no CONFIG to enable it in U-Boot for now.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: add PSCI support for UniPhier ARMv7 SoCsMasahiro Yamada
Currently, only the CPU_ON function is supported. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: add uniphier_cache_set_active_ways()Masahiro Yamada
This outer cache allows to control active ways independently for each CPU, so this function will be useful to set up active ways for a specific CPU. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: add uniphier_cache_inv_way() to support way invalidationMasahiro Yamada
This invalidates entries in specified ways of the outer cache. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: move (and rename) CONFIG_UNIPHIER_L2CACHE_ON to KconfigMasahiro Yamada
Move this option to Kconfig, renaming it into CONFIG_CACHE_UNIPHIER. The new option name makes sense enough, and the same as Linux has. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: move outer cache register macros to .c fileMasahiro Yamada
Now, all of these macros are only used in cache-uniphier.c, so there is no need to export them in a header file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: reuse uniphier_cache_disable() for lowlevel_initMasahiro Yamada
The DRAM is available at this point, so setup the temporary stack and call the C function to reduce the code duplication a bit. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: export uniphier_cache_enable/disable functionsMasahiro Yamada
The System Cache (outer cache) is used not only as L2 cache, but also as locked SRAM. The functions for turning on/off it is necessary whether the L2 cache is enabled or not. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: move lowlevel debug init code after page table switchMasahiro Yamada
As the sLD3 Boot ROM has a complex page table, it is difficult to set up the debug UART with enabling it. It will be much easier to initialize the UART port after switching over to the straight-mapped page table. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: fix ROM boot mode for PH1-sLD3Masahiro Yamada
Commit 4b50369fb535 ("ARM: uniphier: create early page table at run-time") broke the ROM boot mode for PH1-sLD3 SoC, because the run-time page table creation requires the outer cache register access but the page table in the sLD3 Boot ROM does not straight-map virtual/physical addresses. The idea here is to check the current page table to determine if it is a straight map table. If not, adjust the outer cache register base. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: refactor L2 zero-touching code in lowlevel_initMasahiro Yamada
Here, the ldr pseudo-instruction falls into the ldr + data set. The register access by [r1, #offset] produces shorter code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: do not compile v7_outer_cache_disable if L2 is disabledMasahiro Yamada
If CONFIG_UNIPHIER_L2CACHE_ON is undefined, the L2 cache is never enabled, so there is no need for v7_outer_cache_disable(). The weak stub avoids the compile error anyway. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: support prefetch and touch operations for outer cacheMasahiro Yamada
The UniPhier outer cache (L2 cache on ARMv7 SoCs) can be used as SRAM by locking ways. These functions will be used to transfer the trampoline code for SMP into the locked SRAM. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-08-11ARM: uniphier: refactor outer cache codeMasahiro Yamada
Unify the range/all operation routines into the common function, uniphier_cache_maint_common(), and sync code with Linux a bit more. This reduces the code duplication. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24ARM: uniphier: rename outer-cache register macrosMasahiro Yamada
Sync register macros with Linux code. This will be helpful to develop the counterpart of Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-07-24ARM: uniphier: clear notification flag before L2 operationMasahiro Yamada
Clear the flag immediately before cache operation to not depend on the previous state. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-06-30ARM: uniphier: fix typo "talbe"Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-11arm: Replace v7_maint_dcache_all(ARMV7_DCACHE_CLEAN_INVAL_ALL) with asm codeHans de Goede
v7_maint_dcache_all() does not work reliable when build with gcc6, see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788 While debugging this I learned that v7_maint_dcache_all() is unreliable when build with gcc5 too when it is marked as noinline. This commit fixes the reliability issues by replacing the C-code with the ready to use asm implementation from the kernel. Given that this code when written as C-code clearly is quite fragile (also see the existing comments about the C-code being the way it is to get optimal assembly) and that we have a proven asm alternative, I believe that this is the best solution. Note that we actually already had a copy of the kernel's v7_flush_dcache_all() before this commit in arch/arm/mach-uniphier/arm32/lowlevel_init.S. This commit moves that code arch/arm/cpu/armv7/cache_v7_asm.S, renames it to __v7_flush_dcache_all(), and adds a v7_flush_dcache_all() wrapper which saves / restores the clobbered registers for use from C-code. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-04-01ARM: uniphier: rename function names ph1_* to uniphier_*Masahiro Yamada
Eliminate the "ph1"_ prefixes from function names because "uniphier_" describes the SoC familiy better. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-24ARM: uniphier: drop PH1- prefix from CONFIG options and file namesMasahiro Yamada
The current CONFIG names like "CONFIG_ARCH_UNIPHIER_PH1_PRO4" is too long. It would not hurt to drop "PH1_" because "UNIPHIER_" already well specifies the SoC family. Also, rename files for consistency. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-09ARM: uniphier: allow debug_ll_init() to do nothing for unknown SoCsMasahiro Yamada
This function should just return for unknown SoCs rather than writing unexpected values to registers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-03-01ARM: uniphier: prepare directory structure for ARMv8 SoC supportMasahiro Yamada
Before adding ARMv8 support, this commit refactors the directory structure. Move ARMv7 specific files to arch/arm/mach-uniphier/arm32 to avoid a mess by mixture of ARMv7 and ARMv8 code. Also move the "select CPU_V7" to the lower-level menu because we will have to select ARM64 instead of CPU_V7 for ARMv8 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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