Age | Commit message (Expand) | Author |
2020-06-04 | riscv: cpu: fu540: Add support for cpu fu540 | Pragnesh Patel |
2020-04-23 | riscv: Make SBI v0.2 the default SBI version | Bin Meng |
2020-04-23 | riscv: Add Kconfig option for SBI v0.2 | Bin Meng |
2020-04-23 | riscv: Add SMP Kconfig option dependency for U-Boot proper | Bin Meng |
2020-04-23 | riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL | Bin Meng |
2020-03-31 | Merge branch 'next' of git://git.denx.de/u-boot-usb into next | Tom Rini |
2020-03-17 | riscv: Introduce a new config for SBI v0.1 | Bin Meng |
2020-03-17 | riscv: Add basic support for SBI v0.2 | Bin Meng |
2020-03-16 | Kconfig: Remove redundant variable sets | Tom Rini |
2020-02-10 | riscv: Add option to print registers on exception | Sean Anderson |
2019-12-10 | riscv: increase stack size to avoid a stack overflow during distro boot | Lukas Auer |
2019-08-26 | riscv: add SPL support | Lukas Auer |
2019-08-26 | riscv: add run mode configuration for SPL | Lukas Auer |
2019-06-05 | riscv: Add Microchip MPFS Icicle board support | Padmarao Begari |
2019-05-18 | CONFIG_SPL_SYS_[DI]CACHE_OFF: add | Trevor Woerner |
2019-05-18 | CONFIG_SYS_[DI]CACHE_OFF: convert to Kconfig | Trevor Woerner |
2019-05-09 | riscv: Introduce CONFIG_XIP to support booting from flash | Rick Chen |
2019-04-08 | riscv: Add a SYSCON driver for Andestech's PLMT | Rick Chen |
2019-04-08 | riscv: Add a SYSCON driver for Andestech's PLIC | Rick Chen |
2019-04-08 | riscv: add support for multi-hart systems | Lukas Auer |
2019-04-08 | riscv: implement IPI platform functions using SBI | Lukas Auer |
2019-04-08 | riscv: add infrastructure for calling functions on other harts | Lukas Auer |
2019-02-27 | riscv: Add SiFive FU540 board support | Anup Patel |
2019-02-27 | riscv: Rename cpu/qemu to cpu/generic | Anup Patel |
2018-12-18 | riscv: Enlarge the default SYS_MALLOC_F_LEN | Bin Meng |
2018-12-18 | riscv: qemu: Add platform-specific Kconfig options | Bin Meng |
2018-12-18 | riscv: Implement riscv_get_time() API using rdtime instruction | Anup Patel |
2018-12-18 | riscv: Add a SYSCON driver for SiFive's Core Local Interruptor | Bin Meng |
2018-12-18 | riscv: Introduce a Kconfig option for machine mode | Anup Patel |
2018-12-18 | riscv: add Kconfig entries for the code model | Lukas Auer |
2018-12-05 | riscv: Add kconfig option to run U-Boot in S-mode | Anup Patel |
2018-11-26 | riscv: cache: Implement i/dcache [status, enable, disable] | Rick Chen |
2018-11-26 | riscv: add Kconfig entries for the C and A ISA extensions | Lukas Auer |
2018-11-26 | riscv: select CONFIG_PHYS_64BIT on RV64I systems | Lukas Auer |
2018-11-26 | riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I | Lukas Auer |
2018-10-03 | riscv: Add QEMU virt board support | Bin Meng |
2018-10-03 | riscv: kconfig: Normalize architecture name spelling | Bin Meng |
2018-05-29 | riscv: cpu: nx25: Rename as ax25 | Rick Chen |
2018-01-12 | riscv: Add Kconfig to support RISC-V | Rick Chen |