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We're starting to use more and more BCRs and having their
definitions in-lined in sources becomes a bit annoying
so we move it all to a separate header.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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Move IOC initialization from cache_init() to a separate function.
This is the preparation for the next patch where we'll switch
to is_isa_arcv2() function usage instead of "CONFIG_ISA_ARCV2"
ifdef.
Also it makes cache_init function a bit cleaner.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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We don't implement separate flush_dcache_all() intentionally as
entire data cache invalidation is dangerous operation even if we flush
data cache right before invalidation.
There is the real example:
We may get stuck in the following code if we store any context (like
BLINK register) on stack in invalidate_dcache_all() function.
BLINK register is the register where return address is automatically saved
when we do function call with instructions like 'bl'.
void flush_dcache_all() {
__dc_entire_op(OP_FLUSH);
// Other code //
}
void invalidate_dcache_all() {
__dc_entire_op(OP_INV);
// Other code //
}
void foo(void) {
flush_dcache_all();
invalidate_dcache_all();
}
Now let's see what really happens during that code execution:
foo()
|->> call flush_dcache_all
[return address is saved to BLINK register]
[push BLINK] (save to stack) ![point 1]
|->> call __dc_entire_op(OP_FLUSH)
[return address is saved to BLINK register]
[flush L1 D$]
return [jump to BLINK]
<<------
[other flush_dcache_all code]
[pop BLINK] (get from stack)
return [jump to BLINK]
<<------
|->> call invalidate_dcache_all
[return address is saved to BLINK register]
[push BLINK] (save to stack) ![point 2]
|->> call __dc_entire_op(OP_FLUSH)
[return address is saved to BLINK register]
[invalidate L1 D$] ![point 3]
// Oops!!!
// We lose return address from invalidate_dcache_all function:
// we save it to stack and invalidate L1 D$ after that!
return [jump to BLINK]
<<------
[other invalidate_dcache_all code]
[pop BLINK] (get from stack)
// we don't have this data in L1 dcache as we invalidated it in [point 3]
// so we get it from next memory level (for example DDR memory)
// but in the memory we have value which we save in [point 1], which
// is return address from flush_dcache_all function (instead of
// address from current invalidate_dcache_all function which we
// saved in [point 2] !)
return [jump to BLINK]
<<------
// As BLINK points to invalidate_dcache_all, we call it again and
// loop forever.
Fortunately we may do flush and invalidation of D$ with a single one
instruction which automatically mitigates a situation described above.
And because invalidate_dcache_all() isn't used in common U-Boot code we
implement "flush and invalidate dcache all" instead.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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Introduce is_isa_arcv2() and is_isa_arcompact() functions.
These functions only check configuration options and return
compile-time constant so they can be used instead of #ifdef's to
to write cleaner code.
Now we can write:
-------------->8---------------
if (is_isa_arcv2())
ioc_configure();
-------------->8---------------
instead of:
-------------->8---------------
ifdef CONFIG_ISA_ARCV2
ioc_configure();
endif
-------------->8---------------
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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As of today __dc_line_op() and __dc_entire_op() support
only separate flush (OP_FLUSH) and invalidate (OP_INV) operations.
Add support of combined flush and invalidate (OP_FLUSH_N_INV)
operation which we planing to use in subsequent patches.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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__cache_line_loop() function was copied from Linux kernel
where per-line instruction cache operations are really used.
In U-Boot we use only entire I$ ops, so we can drop support of
per-line I$ ops from __cache_line_loop() because __cache_line_loop()
is never called with OP_INV_IC parameter.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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Move instruction cache entire operation to a separate function
because we are planing to use it in other places like
sync_icache_dcache_all().
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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We improve on 2 things:
1. Only ARC HS family has "dmb" instructions so do compile-time
check for automatically defined macro __ARCHS__.
Previous check for ARCv2 ISA was not good enough because ARC EM
family is v2 ISA as well but still "dmb" instaruction is not
supported in EM family.
2. Still if there's no dedicated instruction for memory barrier
let's at least insert compile-time barrier to make sure
compiler deosn't reorder critical memory operations.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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Disabling relocation might be useful on ARC for 2 reasons:
a) For advanced debugging with Synopsys proprietary MetaWare debugger
which is capable of accessing much more specific hardware resources
compared to gdb. For example it may show contents of L1 and L2 caches,
internal states of some hardware blocks etc.
But on the downside MetaWare debugger still cannot work with PIE.
Even though that limitation could be work-arounded with change of ELF's
header and stripping down all debug info but with it we won't have
debug info for source-level debugging which is quite inconvenient.
b) Some platforms which might benefit from usage of U-Boot basically
don't have enough RAM to accommodate relocation of U-Boot so we
keep code in flash and use as much of RAM as possible for more
interesting things.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
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Finally GCC's garbage collector works on ARC so let's use it.
That's what I may see for HSDK:
Before:
text data bss dec hex filename
290153 10068 222616 522837 7fa55 u-boot
After:
text data bss dec hex filename
261999 9460 222360 493819 788fb u-boot
Overall ~5% of memory footprint saved.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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This commit basically reverts two commits:
1. cf628f772ef2 ("arc: arcv1: Disable master/slave check")
2. 6cba327bd96f ("arcv2: Halt non-master cores")
With mentioned commits in-place we experience more trouble than
benefits. In case of SMP Linux kernel this is really required as
we have all the cores running from the very beginning and then we
need to allow master core to do some preparatory work while slaves
are not getting in the way.
In case of U-Boot we:
a) Don't really run more than 1 core in parallel
b) We may use whatever core for that
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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U-Boot is a bit special piese of software because it is being
only executed once on power-on as compared to operating system
for example. That's why we don't care much about performance
optimizations instead we're more concerned about size. And up-to-date
compilers might produce much smaller code compared to
performance-optimized routines copy-pasted from the Linux kernel.
Here's an example:
------------------------------->8--------------------------
--- size_asm_strings.txt
+++ size_c_strings.txt
@@ -1,2 +1,2 @@
text data bss dec hex filename
- 121260 3784 3308 128352 1f560 u-boot
+ 120448 3784 3308 127540 1f234 u-boot
------------------------------->8--------------------------
See we were able to shave off ~800 bytes of .text section.
Also usage of string routines implemented in C gives us an ability
to support more HW flavors for free: generated instructions will match
our target as long as correct compiler option is used.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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IFC-NOR and QSPI-NOR pins are multiplexed on SoC, so they cannot be
accessed simultaneously. IFC-NOR can be accessed along with SD-BOOT.
Ls1088aqds_sdcard_ifc_defconfig is default config for SD boot and
IFC-NOR to be used as flash. This allows writing to IFC-NOR flash.
QSPI and DSPI cannot be accessed in this defconfig.
IFC-NOR image is generated using ls1088aqds_defconfig.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Add first support for STM32MP157C-ED1 board with "Basic" boot chain
1/ Boot Rom: load SPL with STM32 image header in SYSRAM
2/ SPL: power up and initialize the DDR and load U-Boot image
from SDCARD in DDR
3/ U-Boot: search and load extlinux.conf in SDCARD
(DISTRO activated)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Add minimal devicetree for STM32MP157C-ED1 board,
with only the devices to allow boot from SDCARD:
- RCC for clock and reset
- UART4 for console
- I2C and PMIC
- DDR
- SDMMC0 for SDCard
Waiting Kernel upstream for alignment.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Add driver and binding for stm32mp1 ddr controller and phy
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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- add new arch stm32mp for STM32 MPU/Soc based on Cortex A
- support for stm32mp157 SOC
- SPL is used as first boot stage loader
- using driver model for all the drivers, even in SPL
- all security feature are deactivated (ETZC and TZC)
- reused STM32 MCU drivers when it is possible
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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The current value timer_rate_hz causes a problem with function
timer_get_us() from lib time and then an issue with
readx_poll_timeout() function.
With corrected value for tbclk() = timer_rate_hz = CONFIG_SYS_HZ_CLOCK
the weak functions in lib timer can be used:
- get_timer()
- __udelay()
So the specific function in this file are removed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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Add proper and simple kconfig option for dram_sun8i_a83t.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add proper and simple kconfig option for dram_sun8i_a33.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add proper and simple kconfig option for dram_sun8i_a23.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add proper and simple kconfig option for dram_sun9i.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add proper and simple kconfig option for dram_sun4i.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add proper and simple kconfig option for dram_sun6i.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add simple and meaningful kconfig option for pmic_bus.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add simple and meaningful kconfig option for rsb.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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SUN6I_PRCM is also used for SUN8I and SUN9I, so
select the same on respective MACH types.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add simple and meaningful kconfig option for p2wi.c
instead of using MACH type on Makefile.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add simple and meaningful kconfig option for prcm.c
instead of using MACH type on Makefile.
PRCM (Power/Reset/Clock Management) is considered as a
Multi-Functional Device, so used the same on Kconfig definition.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Enable the display controller, panel & backlight.
Set panel display timings & set the RGB data bus.
Signed-off-by: yannick fertre <yannick.fertre@st.com>
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Add display controller node in device-tree.
Signed-off-by: yannick fertre <yannick.fertre@st.com>
[agust: rebased on master]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Merge init_helpers.h in the new file init.h
with only prototypes for init_cache_f_r
used in common/board_f.c
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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This file is completely unused and it should be removed as the part of
ppc405/ppc440 xilinx platform removal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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This converts the following to Kconfig:
CONFIG_CONS_INDEX
We have existing entries for this option in a number of places, with
different guards on them. They're also sometimes used for things not
directly inside of the serial driver. First, introduce a new symbol to
guard the use of CONFIG_CONS_INDEX, so that in the case where we don't
need this for the serial driver, but for some other use, we can still do
it. Next, consolidate all of these into the single entry in
drivers/serial/Kconfig. Finally, introduce CONS_INDEX_[023456] so that
we can imply a correct value here to make the defconfig side of this
smaller.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rework a lot of the logic here, such that I took authorship from
Adam, but kept his S-o-B line]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Add USB clock driver to configure the input clock and the divider
in the PMC_USB register to generate a 48MHz and a 12MHz signal to
the USB Host OHCI.
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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When enabling CONFIG_FASTBOOT_FLASH in am335x_boneblack_defconfig, next
build errors and warnings occur:
arch/arm/mach-omap2/utils.c: In function ‘omap_set_fastboot_cpu’:
arch/arm/mach-omap2/utils.c:26:16: warning: implicit declaration of
function ‘omap_revision’ [-Wimplicit-function-declaration]
u32 cpu_rev = omap_revision();
^~~~~~~~~~~~~
arch/arm/mach-omap2/utils.c:29:7: error: ‘DRA762_ES1_0’ undeclared
(first use in this function)
Include asm/omap_common.h explicitly to avoid those.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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The SPL can't use high speed MMC modes if the associated pinctrl and
IOdelays are described in the DTS.
Make them available in SPL by tagging the nodes with 'u-boot,dm-spl;'
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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Now that we have a device-tree include file with common
MMC/SD IOdelay data for DRA76x SoC, shift the EVM device-tree
file to using that.
Also fix the name of the IO voltage regulator for mmc1.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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Add a common device-tree include file with MMC/SD IOdelay data
for DRA76x SoC based on the linux DTSI file.
In the most common case, IOdelay data available in datamanual
can directly be used. This file caters to that common case.
Data is based on DRA76x datamanual, SPRS993A, revised July 2017.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
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On linux kernel side, on STM32F7 and STM32H7 SoCs, DMA requires
uncachable regions. These regions are defined in DT.
Since kernel linux v4.15, on ARMv7-M Cortex, kernel is able
to configure MPU regions depending on DT settings.
As kernel is able to configure MPU, this allows to remove
MPU region settings in bootloader.
On Cortex M processors, MPU allows to use a default memory map.
(see B3.5.4 MPU Control Register, MPU_CTRL in
https://developer.arm.com/products/architecture/m-profile/docs/ddi0403/latest/armv7-m-architecture-reference-manual)
Use the default memory map as background region for all STM32 SoCs
family with an additional MPU region corresponding to the SDRAM area.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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This board offers:
_ STM32F746NGH6 microcontroller with 1 Mbyte Flash and 320+4 Kbytes RAM
_ Six 5 V power supply options:
Power jack
ST-LINK/V2-1 USB connector
User USB HS connector
User USB FS1 connector
User USB FS2 connector
Daughterboard
_ SAI Audio DAC, stereo audio jack which supports headset with microphone
_ Stereo digital microphone, audio jack connector used to connect
external speakers
_ 2 Gbytes (or more) SDMMC interface microSD card
_ RF-EEPROM on I2C compatible serial interface
_ RS-232 communication
_ IrDA transceiver
_ JTAG/SWD and ETM trace debug support, ST-LINK/V2-1 embedded
_ IEEE-802.3-2002 compliant Ethernet connector
_ Camera module
_ 8Mx32 bit SDRAM, 1Mx16 bit SRAM & 8Mx16 bit Nor Flash
_ 512 Mbits QuadSPI Nor Flash
_ 5.7 inch 640x480 pixel TFT color LCD with capacitive touch panel
_ Joystick with 4-direction control and selector
_ Reset, WakeUp/Tamper or key button
_ 4 color user LEDs
_ Extension connectors & memory connectors for daughterboard or
wrapping board
_ USB OTG HS and FS with Micro-AB connectors
_ RTC with backup battery
_ CAN 2.0A/B compliant connection
_ Potentiometer
_ Motor control connector
More detailed information are available here :
http://www.st.com/en/evaluation-tools/stm32746g-eval.html
To compile stm32f746-eval board, use same defconfig as
stm32f746-disco, the only difference is to pass
"DEVICE_TREE=stm32746g-eval".
Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
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Remove all unused defines
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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Remove arch/arm/include/asm/arch-stm32fx/stm32_periph.h
as all defines or enums are no more used.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
Some common defines are duplicated or even unused in each of
these stm32.h.
Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
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