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2018-09-18mpc83xx: Add sysreset driverMario Six
Add a sysreset driver for the MPC83xx platform. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18powerpc: Add read*_*/write*_* macrosMario Six
Define the read*_*/write*_* macros for the PowerPC platform to be able to use the macros in wait_bit.h. Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18ram: Add driver for MPC83xxMario Six
Add a RAM driver for the MPC83xx architecture. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-18sandbox: Enable bitrev library buildBin Meng
Imply CONFIG_BITREVERSE for Sandbox. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-18sandbox: Build with -fPICAndy Shevchenko
Sandbox is not a real bootloader and it does require a position independent code to be supported. Thus, build it with -fPIC explicitly. Fixes: 16940f720f9b ("Makefile: Don't generate position independent code") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reported-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2018-09-17Merge git://git.denx.de/u-boot-x86Tom Rini
2018-09-17x86: cpu: add docstring to scu_ipc_command()Georgii Staroselskii
These comments were copied from the Linux kernel driver in drivers/platform/x86/intel_scu_ipc.c Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: tangier: acpi: add I2C6 nodeGeorgii Staroselskii
Now that we have I2C#6 working, it's time to add a corresponsing ACPI binding. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: dts: edison: configure I2C#6 pinsGeorgii Staroselskii
Now that we have the pinctrl driver for Merrifield in place we can make use of it and set I2C#6 pins appropriately. Initial configuration came from the firmware. Which quite likely has been used in the phones, where that is not part of Atom peripheral, is in use. Thus we need to override the leftover. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: tangier: pinmux: add API to configure protected pinsGeorgii Staroselskii
This API is going to be used to configure some pins that are protected for simple modification. It's not a comprehensive pinctrl driver but can be turned into one when we need this in the future. Now it is planned to be used only in one place. So that's why I decided not to pollute the codebase with a full-blown pinctrl-merrifield nobody will use. This driver reads corresponding fields in DT and configures pins accordingly. The "protected" flag is used to distinguish configuration of SCU-owned pins from the ordinary ones. The code has been adapted from Linux work done by Andy Shevchenko in pinctrl-merrfifield.c Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix build warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-17x86: cpu: introduce scu_ipc_raw_command()Georgii Staroselskii
This interface will be used to configure properly some pins on Merrifield that are shared with SCU. scu_ipc_raw_command() writes SPTR and DPTR registers before sending a command to SCU. This code has been ported from Linux work done by Andy Shevchenko. Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-09-16Merge branch 'master' of git://git.denx.de/u-boot-coldfireTom Rini
2018-09-16Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini
2018-09-16m68k: ColdFire mcf5441x, add eSDHC supportAngelo Dureghello
This patch adds mcf5441x eSDHC support for the mcf5441x family. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16m68k: fix multiple memory accesses on swap operationsAngelo Dureghello
On a u32 val = __sw32(*addr); multiple memory accesses are not welcome, since "addr" may be an IO peripheral register address. This patch changes __sw16/32 to perform a single memory access for the source value. Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-16m68k: fix mcf5441x total interrupt numberAngelo Dureghello
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2018-09-15sh: tmu: Zap get_tbclk and timer_read_counterMarek Vasut
Replace those two functions with generic ones by defining the timer macros in include/config/*.h . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up register usageMarek Vasut
The code uses all in all three TMU registers, drop the massive register layout structures and just define the required timer registers and use them throughout the code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Inline sh_tmu.hMarek Vasut
The header contains only the TMU register layout, just inline it into the TMU timer implementation and drop the header completely. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up CONFIG_SH_TMU_CLK_FREQMarek Vasut
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2, while the old SH parts use CONFIG_SYS_CLK_FREQ directly. Just put this into the TMU implementation and drop the CONFIG_SH_TMU_CLK_FREQ config option. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Inline get_tmu0_clk_rate()Marek Vasut
This function just returns CONFIG_SH_TMU_CLK_FREQ, use the constant directly instead. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Inline tmu_timer_{start,stop}()Marek Vasut
These functions are always called for timer = 0, so drop the timer check. Since these functions are called from one place only and they are reduced to one line of code, just inline them. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Simplify the tmu_bit mathMarek Vasut
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0. Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: tmu: Clean up CONFIG_SYS_TMU_CLK_DIVMarek Vasut
This constant is always 4 , for all boards that exist. Define it once in arch/sh/lib/time.c and remove it from the configs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-09-15sh: sh7724: Drop EDMR macroMarek Vasut
Drop the macro as it is never used and it collides with sh_eth.h macros. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-09-15socfpga: stratix10: fix sdram_calculate_sizeDalon Westergreen
Incorrect type of size variable results in 0 being returned for sdram sizes greater than or equal to 4GB. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
2018-09-14Revert "ARM: da850evm_direct_nor_defconfig: Enable DM_SERIAL"Tom Rini
This commit is breaking several variants of da850, so: This reverts commit 5f389201dece76b484443773dce2525dc205f5a1. Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-14imx: imx6ull: fix pinmux input_val for uart5 rx pinHeiko Schocher
just try to bring up an imx6ull board with console on uart5 and found, that input_val for pin MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX is 7 and not 5 on imx6ull. With this patch rx works now. Signed-off-by: Heiko Schocher <hs@denx.de>
2018-09-14pico-imx6ul: Convert to SPLFabio Estevam
There are two versions of imx6ul pico SOMs: one with 256MB and another one with 512MB of RAM. Convert to SPL so that both versions can be supported. This patch doesn't rework the clock initialization to avoid changing the behavior in this same patch, so it will be cleaned up in future. Currently only the 256MB is tested/supported. Signed-off-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
2018-09-11ARM: da850evm_direct_nor_defconfig: Enable DM_SERIALAdam Ford
With DM enabled, this patch enables DM_SERIAL and removes the NS16550 initialization from da850_lowlevel since the driver will take care of that itself. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11ARM: mach-omap2: Don't initialize I2C if DM_I2C is enabledAdam Ford
boot-common.c checks to see if I2C is enabled in SPL, but it doens't check for DM_I2C before initializing it. This will now only initialize the I2C is the DM_I2C is not enabled to avoid initializing it more than once. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-11ARM: dts: da850-evm-u-boot: Remove redundant entriesAdam Ford
With the re-sync from Linux 4.18, several entries in da850-evm-u-boot.dtsi are no longer necessary, so this patch removes them. Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11arm: dts: da850: Re-sync da850-evm.dts from Linux 4.18Adam Ford
Signed-off-by: Adam Ford <aford173@gmail.com>
2018-09-11Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini
2018-09-11arm64: dts: k3: Add u-boot specific nodesLokesh Vutla
Add the minimum dt nodes required to boot. These nodes will get deleted as kernel gets these nodes added in the main dts files. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm64: dts: k3: Add Support for AM654 SoCLokesh Vutla
Add initial DT support for AM654 EVM that runs on A53. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11board: ti: am654: a53: Add initial support for am654Lokesh Vutla
Add initial support for AM654 based EVM running on A53. Enable 4GB of DDR available on the EVM so that kernel DTB file can be updated accordingly. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> [Andreas: Added 4GB ddr support] Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11gpio: do not include <asm/arch/gpio.h> for ARCH_K3Lokesh Vutla
As no gpio.h is defined in arch/arm/mach-k3/include/, to avoid compilation failure, do not include asm/arch/gpio.h. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11armv8: K3: am654: Add support for generating build targetsLokesh Vutla
Update Makefile to generate - tispl.bin: First stage bootloader on ARMv8 core - u-boot.img: Second stage bootloader on ARMv8 core. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11armv8: K3: am654: Add custom MMU supportLokesh Vutla
Add MMU mappings for AM654 SoC. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm: K3: am654: Unlock control module registers during initAndreas Dannenberg
By default the device control module registers are locked, preventing any writes to its registers. Unlock those registers as part of the init flow. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm: K3: am654: Add support for boot device detectionLokesh Vutla
AM654 allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11arm: K3: Update _start instructionLokesh Vutla
On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and expects to start executing from 0x0. In order to handle this ROM updates the boot vector of R5 such that first 64 bytes of image load address are mapped to 0x0. In this case, it is SPL's responsibility to jump to the proper image location. So, update the PC with address of reset vector(like how other exception vectors are handled), instead of branching to reset. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11arm: K3: Add support for AM654 SoC definitionLokesh Vutla
The AM654 device is designed for industrial automation and PLC controller class platforms among other applications. Introduce base support for AM654 SoC. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11arm: K3: Add initial support for TI's K3 generation of SoCsLokesh Vutla
Add support for Texas Instruments' K3 Generation Processor families. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11ARM: uniphier: remove ad-hoc clock enabling for EHCIMasahiro Yamada
The MIO clock is enabled by default, and the STDMAC clock is enabled by the clk driver. The ad-hoc way to enable the clock is no longer needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11mmc: uniphier-sd: sync with LinuxMasahiro Yamada
Sync with the driver code and the binding recently merged in Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-11ARM: dts: uniphier: sync DT with Linux 4.19-rc1Masahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-09-10arm: armv7m: clean up armv7m unified code compilationVikas Manocha
unified syntax should be selected by config ARM_ASM_UNIFIED Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
2018-09-10arm: armv7m: remove un-necessary If then instructionVikas Manocha
With gas option -mimplicit-it=always, IT block is inserted by the assembler for thumb2. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>