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2017-03-28board: freescale: ls2080a/ls2088a: Enable PPASantan Kumar
Enable PPA on LS2080A, LS2088A boards: -LS2080ARDB, LS2080AQDS -LS2088ARDB, LS2088AQDS Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28fsl: Secure Boot: Enable IE (Key extention) FeatureUdit Agarwal
For validating images from uboot (Such as Kernel Image), either keys from SoC fuses can be used or keys from a verified table of public keys can be used. The latter feature is called IE Key Extension Feature. For Layerscape Chasis 3 based platforms, IE table is validated by Bootrom and address of this table is written in scratch registers 13 and 14 via PBI commands. Following are the steps describing usage of this feature: 1) Verify IE Table in ISBC phase using keys stored in fuses. 2) Install IE table. (To be used across verification of multiple images stored in a static global structure.) 3) Use keys from IE table, to verify further images. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28fsl-layerscape/ppa: cleanup ppa.hHou Zhiqiang
Moved the ifdef into ppa.h and removed the duplicated macros. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-28armv8: LS2080A: Move sec_init to board_initUdit Agarwal
Moves sec_init to board_init rather than in misc_init function beacuse PPA will be initialised in board_init function and for PPA validation sec_init has to be done prior to PPA init. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-19Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/bk4r1_defconfig configs/colibri_vf_defconfig configs/pcm052_defconfig include/configs/colibri_vf.h include/configs/pcm052.h
2017-03-19ARM: vf610: move to standard arch/board approachStefan Agner
Move Freescale/NXP Vybrid to a standard arch/board approach, similar to what has been done to i.MX 6 earlier in commit 89ebc82137be ("ARM: mx6: move to a standard arch/board approach"). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2017-03-17imx: imx7ulp: add EVK board supportPeng Fan
Add EVK board support. Add the evk dts file. LOG: U-Boot 2017.03-rc2-00038-gab86c1d (Feb 22 2017 - 15:59:58 +0800) CPU: Freescale i.MX7ULP rev1.0 at 500 MHz Reset cause: POR Boot mode: Dual boot Model: NXP i.MX7ULP EVK DRAM: 1 GiB MMC: FSL_SDHC: 0 In: serial@402D0000 Out: serial@402D0000 Err: serial@402D0000 Net: Net Initialization Skipped No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-03-14armv8: fsl-layerscape: Add vid support for LS2080AQDSPriyanka Jain
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Arpit Goel <arpit.goel@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-14armv8: fsl-lsch3: Update VID supportPriyanka Jain
VID support in NXP layerscape Chassis-3 (lsch3) compilant SoCs like LS2088A, LS2080A differs from existing logic. -VDD voltage array is different -Registers are different -VDD calculation logic is different Add new function adjust_vdd() for LSCH3 compliant SoCs Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Arpit Goel <arpit.goel@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-03-14armv8: layerscape: Update early MMU for DDR after initializationYork Sun
In early MMU table, DDR has to be mapped as device memory to avoid speculative access. After DDR is initialized, it needs to be updated to normal memory to allow code execution. To simplify the code, dram_init() is moved into a common file as a weak function. Signed-off-by: York Sun <york.sun@nxp.com>
2017-03-14armv8: layerscape: Rewrite memory reservationYork Sun
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved at the end of DDR. DDR is spit into two or three banks. This patch reverts commit aabd7ddb and simplifies the calculation of reserved memory, and moves the code into common SoC file. Secure memory is carved out first. DDR bank size is reduced. Reserved memory is then allocated on the top of available memory. U-Boot still has access to reserved memory as data transferring is needed. Device tree is fixed with reduced memory size to hide the reserved memory from OS. The same region is reserved for efi_loader. Signed-off-by: York Sun <york.sun@nxp.com>
2017-03-09Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigsTom Rini
In some cases this is absolutely required, so select this for some secure features. This also requires migration of RSA_FREESCALE_EXP Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Saksham Jain <saksham.jain@nxp.freescale.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2017-02-12flash: complete CONFIG_SYS_NO_FLASH move with renamingMasahiro Yamada
We repeated partial moves for CONFIG_SYS_NO_FLASH, but this is not completed. Finish this work by the tool. During this move, let's rename it to CONFIG_MTD_NOR_FLASH. Actually, we have more instances of "#ifndef CONFIG_SYS_NO_FLASH" than those of "#ifdef CONFIG_SYS_NO_FLASH". Flipping the logic will make the code more readable. Besides, negative meaning symbols do not fit in obj-$(CONFIG_...) style Makefiles. This commit was created as follows: [1] Edit "default n" to "default y" in the config entry in common/Kconfig. [2] Run "tools/moveconfig.py -y -r HEAD SYS_NO_FLASH" [3] Rename the instances in defconfigs by the following: find . -path './configs/*_defconfig' | xargs sed -i \ -e '/CONFIG_SYS_NO_FLASH=y/d' \ -e 's/# CONFIG_SYS_NO_FLASH is not set/CONFIG_MTD_NOR_FLASH=y/' [4] Change the conditionals by the following: find . -name '*.[ch]' | xargs sed -i \ -e 's/ifndef CONFIG_SYS_NO_FLASH/ifdef CONFIG_MTD_NOR_FLASH/' \ -e 's/ifdef CONFIG_SYS_NO_FLASH/ifndef CONFIG_MTD_NOR_FLASH/' \ -e 's/!defined(CONFIG_SYS_NO_FLASH)/defined(CONFIG_MTD_NOR_FLASH)/' \ -e 's/defined(CONFIG_SYS_NO_FLASH)/!defined(CONFIG_MTD_NOR_FLASH)/' [5] Modify the following manually - Rename the rest of instances - Remove the description from README - Create the new Kconfig entry in drivers/mtd/Kconfig - Remove the old Kconfig entry from common/Kconfig - Remove the garbage comments from include/configs/*.h Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-02-03Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/ls1046aqds_defconfig configs/ls1046aqds_nand_defconfig configs/ls1046aqds_qspi_defconfig configs/ls1046aqds_sdcard_ifc_defconfig configs/ls1046aqds_sdcard_qspi_defconfig configs/ls1046ardb_emmc_defconfig configs/ls1046ardb_qspi_defconfig configs/ls1046ardb_sdcard_defconfig
2017-02-03armv8: ls1012a: Add support of PPAPrabhakar Kushwaha
The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-02-03board: freescale: ls1012a: Enable secure DDR on LS1012A platformsPrabhakar Kushwaha
PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-31armv7: ls1021aqds: Set cpo_sample for erratum A-009942York Sun
Set cpo_sample as suggested by the driver "WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize cpo". Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
2017-01-27imx: mx6sxsabreauto: enable more dm driversPeng Fan
Enable MMC/I2C/GPIO/PMIC/REGULATOR/PCA953X DM drivers for mx6sxsabreauto board. Drop non-DM code. Note: The i.MX DM drivers has such dependency. MXC GPIO -> MXC I2C -> PFUZE/REGULATOR MXC GPIO -> PCA953X MXC GPIO -> FSL_USDHC So the drivers needs to be enabled all to avoid compiling error. The uboot dm tree log: => dm tree Class Probed Name ---------------------------------------- root [ + ] root_driver thermal [ ] |-- imx_thermal simple_bus [ + ] |-- soc simple_bus [ + ] | |-- aips-bus@02000000 simple_bus [ ] | | |-- spba-bus@02000000 gpio [ + ] | | |-- gpio@0209c000 gpio [ + ] | | |-- gpio@020a0000 gpio [ + ] | | |-- gpio@020a4000 gpio [ + ] | | |-- gpio@020a8000 gpio [ + ] | | |-- gpio@020ac000 gpio [ + ] | | |-- gpio@020b0000 gpio [ + ] | | |-- gpio@020b4000 simple_bus [ ] | | |-- anatop@020c8000 simple_bus [ ] | | |-- snvs@020cc000 pinctrl [ + ] | | `-- iomuxc@020e0000 pinconfig [ + ] | | `-- imx6x-sabreauto pinconfig [ + ] | | |-- i2c2grp-1 pinconfig [ + ] | | |-- i2c3grp-2 pinconfig [ ] | | |-- uart1grp pinconfig [ + ] | | |-- usdhc3grp pinconfig [ ] | | |-- usdhc3grp-100mhz pinconfig [ ] | | |-- usdhc3grp-200mhz pinconfig [ + ] | | |-- usdhc4grp pinconfig [ + ] | | `-- vccsd3grp simple_bus [ + ] | |-- aips-bus@02100000 mmc [ + ] | | |-- usdhc@02198000 mmc [ + ] | | |-- usdhc@0219c000 i2c [ + ] | | |-- i2c@021a4000 i2c_generic [ + ] | | | |-- generic_8 i2c_generic [ + ] | | | `-- generic_4e i2c [ + ] | | `-- i2c@021a8000 gpio [ + ] | | |-- gpio@30 gpio [ + ] | | `-- gpio@32 simple_bus [ ] | `-- aips-bus@02200000 simple_bus [ ] | `-- spba-bus@02200000 simple_bus [ + ] `-- regulators regulator [ + ] `-- regulator@0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2017-01-25powerpc: Drop probecpu() in favour of arch_cpu_init()Simon Glass
To avoid an unnecessary arch-specific call in board_init_f(), rename this function. Signed-off-by: Simon Glass <sjg@chromium.org>
2017-01-24NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUSTTom Rini
Introduce board/freescale/common/Kconfig so that we have a single place for CONFIG options that are shared between ARM and PowerPC NXP platforms. Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-19Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini
2017-01-18armv8: ls1012a: define esdhc_status_fixup for RDB boardYangbo Lu
On LS1012ARDB board, three dual 1:4 mux/demux devices drive the SDHC2 signals to eMMC, SDIO wifi, SPI and Ardiuno shield. Only when we select eMMC and SDIO wifi, the SDHC2 could be used. Otherwise, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for RDB to disable SDHC2 status if no SDIO wifi or eMMC is selected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18armv8: ls1012a: define esdhc_status_fixup for QDS boardYangbo Lu
The LS1012AQDS board has a hardware issue. When there is no eMMC adapter card inserted in SDHC2 adapter slot, the command inhibit bits of eSDHC2_PRSSTAT register will never release. This would cause below continious error messages in linux since it uses polling mode to detect card. "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." "mmc1: Controller never released inhibit bit(s)." This patch is to define esdhc_status_fixup function for QDS to disable SDHC2 status if no eMMC adapter card is detected. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18ls1046ardb: Add support power initializationHou Zhiqiang
Add the chip power supply voltage initialization on LS1046ARDB. Add function power_init_board(), and it will initialize the PMIC and call the chip power initialization function. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18ls1046ardb: cpld: add API for selecting core voltHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-18pmic: pmic_mc34vr500: Add APIs to set/get SWx voltHou Zhiqiang
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: York Sun <york.sun@nxp.com>
2017-01-11SPL: Adjust more debug prints for ulong entry_pointTom Rini
With entry_point now being an unsigned long we need to adapt the last two debug prints to use %lX not %X. Fixes: 11e1479b9e67 ("SPL: make struct spl_image 64-bit safe") Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-08mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfigJagan Teki
Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig which is missing in below commit "imx: mx6ull_14x14_evk: add plugin defconfig" (sha1: b90ebf49bb8f74afe68f696f59a0e24cc79f2031) Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
2017-01-04ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun
These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: T2081QDS: Remove macro T2081QDSYork Sun
Use TARGET_T2081QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: T2080RDB: Remove macro CONFIG_T2080RDBYork Sun
Use TARGET_T2080RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: T2080QDS: Remove macro T2080QDSYork Sun
Use TARGET_T2080QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-04powerpc: T1024RDB: Remove macro CONFIG_T1024RDBYork Sun
Use TARGET_T1024RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Get missing hunk in board/freescale/t102xrdb/ddr.c] Signed-off-by: Tom Rini <trini@konsulko.com>
2017-01-04powerpc: T1023RDB: Remove macro CONFIG_T1023RDBYork Sun
Use TARGET_T1023RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2017-01-02mx6qsabreauto: Fix the EIM clock for the mx6qp variantFabio Estevam
On the MX6Q the aclk_eim_slow_podf field is '1' after POR, while on the MX6DQP it is '3'. This makes the EIM clock to be only 66MHz on the mx6qp variant, instead of 132 MHz. Instead of relying on the POR values for the CSMR1 register, make sure to manually configure the clk_eim_slow_sel field as '00' so that EIM clock is derived from AXI clock and the aclk_eim_slow_podf field as '1' so that EIM clock can be AXI clock divided by 2. This way a consistent EIM clock frequency is configured for all the mx6 variants. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2016-12-27imx: mx6sllevk: add MAINTAINERS filePeng Fan
add MAINTAINERS files Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-12-18Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
Migrate CONFIG_ARCH_USE_MEMSET/MEMCPY with this merge. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-12-16imx: mx6sllevk: add plugin supportPeng Fan
Add plugin support for mx6sllevk board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-12-16arm: imx: add i.MX6SLL EVK board supportPeng Fan
Add i.MX6SLL EVK board support. 1. Add imx6sll-evk device tree. 2. Enable SDHC/I2C/UART. 3. Enable REGULATOR/PMIC/I2C/GPIO/SDHC/PINCTRL driver. Boot Log: U-Boot 2016.11-00127-gc635871-dirty (Nov 24 2016 - 13:28:19 +0800) CPU: Freescale i.MX6SLL rev1.0 at 792MHz CPU: Commercial temperature grade (0C to 95C)Reset cause: POR Model: Freescale i.MX6SLL EVK Board Board: MX6SLL EVK DRAM: 2 GiB i2c bus 0 at 35258368, no gpio pinctrl state. PMIC: PFUZE100! DEV_ID=0x10 REV_ID=0x21 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-12-16imx: clock: gate clk before changing pix clk muxPeng Fan
The LCDIF Pixel clock mux is not glitchless, so need to gate before changing mux. Also change enable_lcdif_clock prototype with a new input parameter to indicate disable or enable. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-12-15ARMv8: LS1043A: Enable LS1043A default PSCI supportmacro.wave.z@gmail.com
A most basic PSCI implementation with only one psci_version is added for LS1043A, this can verify the generic PSCI framework, and more platform specific implementation will be added later. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-15fsl/board/ddr: optimize board-specific cpo for erratum A-009942Shengzhou Liu
Optimize board-specific cpo for erratum A-009942 on b4860qds, ls1043aqds, ls1043ardb, ls1046aqds, ls1046ardb, ls2080ardb, t102xqds, t102xrdb, t1040qds, t104xrdb, t208xqds, t208xrdb, t4qds, t4rdb boards. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
2016-12-05fsl/ddr: Add erratum_a009942_check_cpo and clean related erratumShengzhou Liu
- add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting. - move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts. - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> [YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500] Reviewed-by: York Sun <york.sun@nxp.com>
2016-11-30Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2016-11-29Merge git://git.denx.de/u-boot-mpc85xxTom Rini
2016-11-29imx7: SPI: add suport for SPI flash in mikroBUS slotAngus Ainslie
Enable the escpi3 nets attached to the mikroBUS slot on the i.MX7 Sabre evalution board. Also enble the SPI flash commands to work with the "flash click" board. This is V2 of this patch with changes recommended by the maintainer CC: Jagan Teki <jteki@openedev.com>
2016-11-23powerpc: MPC8641HPCN: Remove macro CONFIG_MPC8641HPCNYork Sun
Use TARGET_MPC8641HPCN from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: MPC8610HPCD: Remove macro CONFIG_MPC8610HPCDYork Sun
Use TARGET_MPC8610HPCD from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T4240RDB: Remove macro CONFIG_T4240RDBYork Sun
Use CONFIG_TARGET_T4240RDB instead. Signed-off-by: York Sun <york.sun@nxp.com>
2016-11-23powerpc: T4160RDB: Separate from T4240RDB in KconfigYork Sun
Use TARGET_T4160RDB to simplify Kconfig options. Signed-off-by: York Sun <york.sun@nxp.com>
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