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path: root/board/mpc8360emds/mpc8360emds.c
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2007-03-02mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffersKim Phillips
Disable G1TXCLK, G2TXCLK h/w buffers. This patch fixes a networking timeout issue with MPC8360EA (Rev.2) PBs. Verified on Rev. 1.1, Rev. 1.2, and Rev. 2.0 boards. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Emilian Medve <Emilian.Medve@freescale.com>
2007-03-02mpc83xx: Add DDR2 controller fixed/SPD Init for MPC83xxXie Xiaobo
The code supply fixed and SPD initialization for MPC83xx DDR2 Controller. it pass DDR/DDR2 compliance tests. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
2006-11-03mpc83xx: Replace CFG_IMMRBAR with CFG_IMMRTimur Tabi
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx tree matches the other 8xxx trees. Signed-off-by: Timur Tabi <timur@freescale.com>
2006-11-03mpc83xx: Fix the incorrect dcbz operationDave Liu
The 834x rev1.x silicon has one CPU5 errata. The issue is when the data cache locked with HID0[DLOCK], the dcbz instruction looks like no-op inst. The right behavior of the data cache is when the data cache Locked with HID0[DLOCK], the dcbz instruction allocates new tags in cache. The 834x rev3.0 and later and 8360 have not this bug inside. So, when 834x rev3.0/8360 are working with ECC, the dcbz instruction will corrupt the stack in cache, the processor will checkstop reset. However, the 834x rev1.x can work with ECC with these code, because the sillicon has this cache bug. The dcbz will not corrupt the stack in cache. Really, it is the fault code running on fault sillicon. This patch fix the incorrect dcbz operation. Instead of CPU FP writing to initialise the ECC. CHANGELOG: * Fix the incorrect dcbz operation instead of CPU FP writing to initialise the ECC memory. Otherwise, it will corrupt the stack in cache, The processor will checkstop reset. Signed-off-by: Dave Liu <daveliu@freescale.com>
2006-11-03mpc83xx: add OF_FLAT_TREE bits to 83xx boardsKim Phillips
add ft_pci_setup, OF_CPU, OF_SOC, OF_TBCLK, and STDOUT_PATH configuration bits to mpc8349emds, mpc8349itx, and mpc8360emds board code. redo environment to use bootm with the fdtaddr for booting ARCH=powerpc kernels by default, and provide default fdtaddr values.
2006-11-03mpc83xx: add QE ethernet supportDave Liu
this patch adds support for the QUICC Engine based UCC gigabit ethernet device.
2006-11-03mpc83xx: Add MPC8360EMDS basic board supportDave Liu
Add support for the Freescale MPC8360EMDS board. Includes DDR, DUART, Local Bus, PCI.