summaryrefslogtreecommitdiff
path: root/cpu/mpc85xx
AgeCommit message (Expand)Author
2009-08-2885xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala
2009-08-22Prepare 2009.08-rc3Wolfgang Denk
2009-08-1485xx: Fix addrmap to include memoryKumar Gala
2009-07-29Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala
2009-07-01fsl_dma: Break out common memory initialization functionPeter Tyser
2009-07-018xxx: Move dma_init() call to common codePeter Tyser
2009-07-01fsl_dma: Move dma function prototypes to common header filePeter Tyser
2009-07-018xxx: Rename dma_xfer() to dmacpy()Peter Tyser
2009-07-018xxx: Break out DMA code to a common filePeter Tyser
2009-06-12fsl/85xx, 86xx: Sync up DMA codePeter Tyser
2009-06-12fsl: Create common fsl_dma.h for 85xx and 86xx cpusPeter Tyser
2009-06-12qe: Pass in uec_info struct through uec_initializeHaiying Wang
2009-06-1285xx: Add QE clk supportHaiying Wang
2009-06-1285xx: Added MPC8535/E identifiersKumar Gala
2009-06-1285xx: Always attempt ethernet device tree fixupKumar Gala
2009-06-1285xx: Use print_size to report amount of memory not mapped by TLBsKumar Gala
2009-06-0985xx: bugfix for reading maximum TLB size on mpc85xxFredrik Arnerup
2009-04-0185xx: Introduce determine_mp_bootpg() helper.Kumar Gala
2009-03-30MPC85xx: Add MPC8569 CPU supportHaiying Wang
2009-03-3085xx: Add support for additional e500mc featuresKumar Gala
2009-03-30fsl-ddr: add the DDR3 SPD infrastructureDave Liu
2009-03-09Fix mpc85xx ddr-gen3 ddr_sdram_cfg.Ed Swarthout
2009-02-19Coding style cleanup, update CHANGELOGWolfgang Denk
2009-02-1685xx: Add eSDHC support for 8536 DSAndy Fleming
2009-02-1632bit BUg fix for DDR2 on 8572Poonam_Aggrwal-b10812
2009-02-16mpc85xx: Add support for the P2020Srikanth Srinivasan
2009-02-1685xx: Fix how we map DDR memoryKumar Gala
2009-02-1685xx: Format cpu freq printing to handle 8 coresKumar Gala
2009-01-23Add secondary CPUs processor frequency for e500 coreHaiying Wang
2009-01-2385xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boardsKumar Gala
2009-01-2385xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boardsKumar Gala
2009-01-13Change DDR tlb start entry to CONFIG param for 85xxHaiying Wang
2008-12-19mpc8[56]xx: Put localbus clock in sysinfo and gdTrent Piepho
2008-12-19mpc8568: Double local bus clock dividerTrent Piepho
2008-12-1985xx: Fix the boot window issueDave Liu
2008-12-19Set IVPR to kenrel entry point in second core boot pageHaiying Wang
2008-12-19mpc8xxx: LCRR[CLKDIV] is sometimes five bitsTrent Piepho
2008-12-19mpc8[56]xx: Put localbus clock in device treeTrent Piepho
2008-12-1985xx: Add support to populate addr map based on TLB settingsKumar Gala
2008-12-06Update U-Boot's build timestamp on every compilePeter Tyser
2008-12-0485xx: init gd as early as possibleKumar Gala
2008-12-0485xx: Fix relocation of CCSRBARKumar Gala
2008-12-0485xx: Add PORDEVSR_PCI1 definePeter Tyser
2008-12-0385xx: Add CPU 2 errata workaround to all 8548 boardsPeter Tyser
2008-11-09Moved initialization of QE Ethernet controller to cpu_eth_init()Ben Warren
2008-11-09Moved initialization of FCC Ethernet controller to cpu_eth_initBen Warren
2008-11-09Fix typo in cpu/mpc85xx/cpu.cBen Warren
2008-10-2485xx: Fix the incorrect register used for DDR erratum1Dave Liu
2008-10-2485xx: Add basic e500mc core supportKumar Gala
2008-10-2485xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic numberKumar Gala
generated by cgit (git 2.34.1) at 2024-12-28 05:16:17 +0000