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path: root/drivers/spi
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2019-12-02common: Move ARM cache operations out of common.hSimon Glass
These functions are CPU-related and do not use driver model. Move them to cpu_func.h Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-12-02common: Move get_ticks() function out of common.hSimon Glass
This function belongs in time.h so move it over and add a comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2019-11-20spi: cadence_qspi: support DM_CLKSimon Goldschmidt
Support loading clk speed via DM instead of requiring ad-hoc code. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-11-08configs: spi: Add the SPI_FLASH_BAR for ESPIXiaowei Bao
Add the SPI_FLASH_BAR for the ESPI controller of FSL, this entry is missed by commit 6d8251783641 ("configs: Don't use SPI_FLASH_BAR as default") Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2019-11-03spi: Add support for memory-mapped flashSimon Glass
On x86 platforms the SPI flash can be mapped into memory so that the contents can be read with normal memory accesses. Add a new SPI method to find the location of the SPI flash in memory. This differs from the existing device-tree "memory-map" mechanism in that the location can be discovered at run-time. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-10-30Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
- H6 dts(i) sync (Clément) - H6 PIO (Icenowy) - Fix pll1 clock calculation (Stefan) - H6 dram, half DQ (Jernej) - A64 OLinuXino eMMC (Sunil)
2019-10-25Merge tag 'mips-pull-2019-10-25' of git://git.denx.de/u-boot-mipsTom Rini
- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs - bmips: various small fixes - mtmips: add new drivers for clock, reset-controller and pinctrl - mtmips: add support for high speed UART - mtmips: update/enhance drivers for SPI and ethernet - mtmips: add support for MMC
2019-10-25spi: mt7621-spi: restore default register value after each xferWeijie Gao
Currently this driver uses a different way to implement the spi xfer, by modifying some fields of two registers, which is incompatible with the MTK's original SDK linux driver. This will cause the flash data being damaged by the SDK driver. This patch lets the mt7621_spi_set_cs() restore the original register fields after cs deactivated. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25spi: mt7621-spi: remove data cache and rewrite its xfer functionWeijie Gao
The mt7621 spi controller supports continuous generic half-duplex spi transaction. There is no need to cache xfer data at all. To achieve this goal, the OPADDR register must be used as the first data to be sent. And follows the eight generic DIDO registers. But one thing different between OPADDR and DIDO registers is OPADDR has a reversed byte order. With this patch, any amount of data can be read/written in a single xfer function call. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25spi: mt7621-spi: use clock frequency from clk driverWeijie Gao
This patch lets the spi driver to use clock provided by the clk driver since the new clk-mt7628 driver provides accurate sys clock frequency. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2019-10-25spi: designware_spi: Disable and free clock when remove driverLey Foon Tan
Disable and free clock when remove driver. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25spi: Kconfig: Enable SPI_SUNXI for SUNXIJagan Teki
SPI_SUNXI driver is fully dm-aware and the Allwinner architecture kconfig would have logic to enable the DM_SPI. So, select default spi sunxi driver for sunxi architecture. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25dm: spi: Change cs_info op to return -EINVAL for invalid cs numBin Meng
We need distinguish the following two situations in various SPI APIs: - given chip select num is invalid - given chip select num is valid, but no device is attached Currently -ENODEV is returned for both cases. For the first case, it's more reasonable to return -EINVAL instead of -ENODEV for invalid chip select numbers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25dm: spi: Return 0 if driver does not implement ops->cs_infoBin Meng
If an SPI controller driver does not implement ops->cs_info, that probably means any chip select number could be valid, hence let's return 0 for spi_cs_info(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-25spi: Kconfig: Add help textJagan Teki
Add detailed help text for SPI support. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-10-24spi: zynqmp: Remove unused platform headersMichal Simek
There is no reason to include clk.h and hardware.h headers. Driver doesn't require them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-10-15dm: spi: Do not assume first SPI busThomas Fitzsimmons
When CONFIG_OF_PRIOR_STAGE is enabled, this workaround was needed before device_bind_common assigned request numbers sequentially in the absence of aliases. Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org>
2019-10-11spi: bcm63xx_hsspi: Continue init when using no reset and fixed-clock.Kursad Oney
The Broadcom ARM implementations do not yet have a clock framework so one can use a fixed clock as the root clock of the hsspi block. The fixed clock does not have an "enable" routine, since it's always enabled. So when we hit this issue, getting an ENOSYS return, do not bail but continue initialization. Similarly the block might already have been out of reset, say, when we are booting from a SPI device. So if the reset signal is not configured in the device tree, do not bail out and instead skip deasserting the reset. Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
2019-10-11spi: bcm63xx_hsspi: switch to raw I/O functions.Kursad Oney
Make the driver compatible with both big and little endian SOCs. Replace big-endian calls with their raw equivalents, expect for writing the command to FIFO. That still has to be in big-endian format. Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-11spi: hsspi: allow to be used on bcm6858 and bcm63158Kursad Oney
This IP exists in both MIPS and ARM cores, so we also allow to use this driver on bcm6858 and bcm63158. Signed-off-by: Kursad Oney <kursad.oney@broadcom.com> Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-10-08spi: fsl_qspi: Add support for QSPI on iMX7ULPYe Li
Add the compatible string and driver data for iMX7ULP platform Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08spi: fsl_qspi: Update to use driver dataYe Li
Add the driver data for each compatible string. So we can remove the SOC config and use driver data instead. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08spi: fsl_qspi: Update write data size for page program LUTYe Li
The write data size can be overwritten by writing to the IDATSZ field of IPCR register. Since the driver always updates the IDATSZ in page program operation. Set the LUT data size to 0 to align the codes with iMX. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08spi: fsl_qspi: Fix DDR mode setting for latest iMX platformsYe Li
On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller is updated to have TDH field in FLSHCR register. According to reference manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX DDR delay logic won't be enabled. Another issue in DDR mode is the MCR register will be overwritten in every read/write/erase operation. This causes DDR_EN been cleared while TDH=1, then no clk2x output for TX data shift and all operations will fail. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-08spi: Add support for SPL_OF_PLATDATA to mxs_spi.c driverLukasz Majewski
After this patch the mxs_spi.c DM/DTS driver can be used at early SPL to read payload from SPI-NOR memories. It was necessary to adjust its name to 'fsl_imx_2{38}_spi' to match requirements for SPL_OF_PLATDATA usage. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08spi: fix: Call mxs_reset_block() during DM/DTS probeLukasz Majewski
Without this change the DM/DTS version of mxs_spi driver doesn't reset the SPI IP block in probe. As a result this driver (when used solely on U-Boot proper) relies on reset performed by mxs spi driver in SPL. In the use case where eMMC is used in SPL as a boot primary device, the mxs_reset_block() is not called at all and DM/DTS aware SPI driver in U-Boot proper is malfunctioning. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-10-08spl: Init proper struct driver member (platdata_auto_alloc_size) for mxs_spiLukasz Majewski
This change initializes proper member of struct driver - platdata_auto_alloc_size instead of priv_auto_alloc_size, which is setup twice. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-09-16spi: Add spi_write_then_readJagan Teki
Add support for SPI synchronous write followed by read, this is common interface call from spi-nor to spi drivers. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
2019-09-16spi: Kconfig: Unmark DEPRECATED for MXS_SPILukasz Majewski
MXS_SPI driver now partially converted into driver-model, so unmark the DEPRECATED option for the same. Signed-off-by: Lukasz Majewski <lukma@denx.de> [jagan: update the commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: soft_spi: Fix data abort if slave is not probedChristophe Kerello
In case spi_get_bus_and_cs callback is used, spi bus is first probed then slave devices are probed. To avoid a data abort in soft_spi probe function, we need to check that (slave != NULL). If slave is NULL, cs_flags and clk_flags will be initialized with respectively GPIOD_ACTIVE_LOW and 0. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-09-16spi: mvebu_a3700_spi: Fix clock prescale computationMarek Behún
The prescaler value computation can yield wrong result if given 0x1f at the beginning: the value is computed to be 0x20, but the maximum value the register can hold 0x1f, so the actual stored value in this case is 0, which is obviously wrong. Set the upper bound of the value to 0x1f with the min macro. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-08-09x86: ich-spi: Convert driver to spi-mem opsBernhard Messerklinger
With the introduction of the new spi-mem model operations changed slightly. The new spi-mem operations make things a bit easier to handle for ich-spi flash interface. This patch converts the ich-spi driver by using spi-mem operations. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested on Intel CrownBay and MinnowMax Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fix compiler warnings when building the driver for 64-bit] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2019-07-27Merge tag 'u-boot-imx-20190719' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20190719 - CCF for i.MX6 - nandbcb command to write SPL into NAND - Switch to DM (i.MX28) - Boards: Toradex, engicam, DH - Fixes for i.MX8 - Fixes for i.MX7ULP Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/561147504
2019-07-27Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-spiTom Rini
- fix for fsl_qspi read timeout (Thomas) - spi-mem read data size fix (Ye Li) - SiFive SPI driver, mmc_spi flags (Bhargav, Anup) - Micron spi-nor parts (Ashish) - MT7629 spi-mem driver(Weijie)
2019-07-25spi: Drop obsolete mtk_qspi driver referencesWeijie Gao
Since u-boot has added the spi-mem framework and replaced the spi-nor framework, the mtk_qspi is no longer compatible with the new spi-nor driver. Remove this driver along with replacing config item with new mtk spi-nor driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> [jagan: squash related changes and update commit message] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-25spi: add spi-mem driver for MediaTek MT7629 SoCWeijie Gao
This patch adds spi-mem driver for MediaTek MT7629 SoC to access SPI-NOR and SPI-NAND flashes. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> [jagan: squash MAINTAINERS file] Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-22spi: stm32_qspi: Remove "st, stm32-qspi" compatible stringPatrice Chotard
"st,stm32-qspi" is no more used, remove it. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2019-07-19spi: mxs: Add support DM/DTS for i.MX28 mxs SPI driver (DM_SPI conversion)Lukasz Majewski
This patch converts mxs_spi driver to support DM/DTS. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
2019-07-18spi: Add SiFive SPI driverBhargav Shah
This patch adds SiFive SPI driver. The driver is 100% DM driver and it determines input clock using clk framework. The SiFive SPI block is found on SiFive FU540 SOC and is used to access flash and MMC devices on SiFive Unleashed board. This driver implementation is inspired from the Linux SiFive SPI driver available in Linux-5.2 or higher and SiFive FSBL sources. Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18drivers/spi: fsl_qspi: improve timeout calculationThomas Schaefer
Use readl_poll_timeout instead of explicit calculation Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18drivers/spi: fsl_qspi: fix read timeoutThomas Schaefer
During QSPI reads, current is_controller_busy function sporadically fails with -ETIMEDOUT due to fixed number of 5 test loops. Using timer functions to wait 1000 us instead will fix this. Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-18spi: spi-mem: Fix read data size issueYe Li
When slave drivers don't set the max_read_size, the spi-mem should directly use data.nbytes and not limit to any size. But current logic will limit to the max_write_size. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2019-07-14Merge tag 'u-boot-stm32-20190712' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-stm - syscon: add support for power off - stm32mp1: add op-tee config - stm32mp1: add specific commands: stboard and stm32key - add stm32 mailbox driver - solve many stm32 warnings when building with W=1 - update stm32 gpio driver
2019-07-12spi: stm32: Fix warnings when compiling with W=1Patrick Delaunay
This patch solves the following warnings: drivers/spi/stm32_spi.c: In function 'stm32_spi_write_txfifo': drivers/spi/stm32_spi.c:116:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] if (priv->tx_len >= sizeof(u32) && ^~ drivers/spi/stm32_spi.c:122:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] } else if (priv->tx_len >= sizeof(u16) && ^~ drivers/spi/stm32_spi.c: In function 'stm32_spi_read_rxfifo': drivers/spi/stm32_spi.c:150:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] (priv->rx_len >= sizeof(u32) || (sr & SPI_SR_RXWNE))) { ^~ drivers/spi/stm32_spi.c:156:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] (priv->rx_len >= sizeof(u16) || ^~ drivers/core/simple-bus.c:15:12: warning: no previous prototype for 'simple_bus_translate' [-Wmissing-prototypes] fdt_addr_t simple_bus_translate(struct udevice *dev, fdt_addr_t addr) ^~~~~~~~~~~~~~~~~~~~ drivers/spi/stm32_spi.c: In function 'stm32_spi_set_speed': drivers/spi/stm32_spi.c:335:10: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] div > STM32_MBR_DIV_MAX) ^ drivers/spi/stm32_spi.c:344:19: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits] if ((mbrdiv - 1) < 0) ^ drivers/spi/stm32_spi.c: In function 'stm32_spi_probe': drivers/spi/stm32_spi.c:531:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] for (i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) { ^ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-12spi: stm32_qspi: avoid warnings when building with W=1 optionPatrick Delaunay
This patch solves warnings detected by setting W=1 when building. Warnings type detected: - [-Wtype-limits] - [-Wsign-compare] Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-07-11Merge tag 'dm-pull-9jul19-take2' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-dm - Sandbox improvements including .dts refactor - Minor tracing and PCI improvements - Various other minor fixes - Conversion of patman, dtoc and binman to support Python 3
2019-07-11Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- SPL SATA enhancements to allow booting from RAW SATA device needed for Clearfog (Baruch) - Enable SATA booting on Clearfog (Baruch) - Misc changes to Turris Omnia (Marek) - Enable CMD_BOOTZ and increase SYS_BOOTM_LEN on crs305-1g-4s (Luka) - Enable FIT support for db-xc3-24g4xg (Chris) - Enable DM_SPI on Keymile Kirkwood board with necessary changes for this (Pascal) - Set 38x and 39x AVS on lower frequency (Baruch)
2019-07-11km/spi: remove deprecated SPI flash driver code for KM Kirkwood boardsPascal Linder
KM Kirkwood boards now implement the driver model for its SPI flash interface. Therefore, the old board specific claim and release functions can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet unused as well. All its appearances and dependencies are removed in the kirkwood_spi driver, header files and finally the configuration whitelist. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-11km/spi: add weak functions to kirkwood_spi driver (DM part)Pascal Linder
The weak functions, known from the legacy code, are added to the DM part as well. For this purpose, the release operation first needs to be implemented. KM Kirkwood boards will overwrite those weak functions to change the MPP configuration when claiming/releasing the bus, because the hardware pins are shared between the SPI NOR and NAND devices. Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch> Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com> Signed-off-by: Stefan Roese <sr@denx.de>
2019-07-10spi: Avoid using malloc() in a critical functionSimon Glass
In general we should avoid calling malloc() and free() repeatedly in U-Boot lest we turn it into tianocore. In SPL this can make SPI flash unusable since free() is often a nop and allocation space is limited. In any case, these seems no need for malloc() since the number of bytes is very small, perhaps less than 8. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI memory controllers)
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