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authorIcenowy Zheng <icenowy@aosc.xyz>2017-06-03 17:10:20 +0800
committerJagan Teki <jagan@amarulasolutions.com>2017-06-08 22:37:55 +0530
commit67337e68a5a88ecbe4ae0df6a91c653f2817c3e1 (patch)
tree8be8c29aed216748488cdbbea7f578cd77a148a2 /arch/arm/mach-sunxi/dram_timings/Makefile
parent176868bc65c15f10e585209af69bca93a0d18a69 (diff)
sunxi: add support for the DDR2 in V3s SoC
Allwinner V3s SoC features a co-packaged DDR2 DRAM chip, which needs its timing param. Add support for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'arch/arm/mach-sunxi/dram_timings/Makefile')
-rw-r--r--arch/arm/mach-sunxi/dram_timings/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-sunxi/dram_timings/Makefile b/arch/arm/mach-sunxi/dram_timings/Makefile
index 7e71c76a5c..a4c9dc556c 100644
--- a/arch/arm/mach-sunxi/dram_timings/Makefile
+++ b/arch/arm/mach-sunxi/dram_timings/Makefile
@@ -1 +1,2 @@
obj-$(CONFIG_SUNXI_DRAM_DDR3_1333) += ddr3_1333.o
+obj-$(CONFIG_SUNXI_DRAM_DDR2_V3S) += ddr2_v3s.o