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authorTom Rini <trini@konsulko.com>2019-02-15 21:21:28 -0500
committerTom Rini <trini@konsulko.com>2019-02-15 21:21:28 -0500
commitd391c13c99a2b48c98cef6df4479247cd4e62f9d (patch)
tree6e5c9790db8a4743cc74f1de52c549bc0dcc006b /include/configs/xilinx_zynqmp_zcu102.h
parente35171e94efdd0fa6c63083a682d452a2403bea1 (diff)
parent91d7e0c47f51e73cd8357f023ffc7c217a3c7291 (diff)
Merge tag 'xilinx-for-v2019.04-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.04-rc2 xilinx: - Start to use distro boot commands first - Setup fdtfile on ZynqMP - Move mac addr eeprom read to common location - Convert to OF_SEPARATE - Switch all board to DM_I2C - Some DT syncs i2c: - Remove !DM_I2C zynq driver versal: - Enable some more features - Add mini configurations
Diffstat (limited to 'include/configs/xilinx_zynqmp_zcu102.h')
-rw-r--r--include/configs/xilinx_zynqmp_zcu102.h47
1 files changed, 0 insertions, 47 deletions
diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h
deleted file mode 100644
index ad6bc3d1bf..0000000000
--- a/include/configs/xilinx_zynqmp_zcu102.h
+++ /dev/null
@@ -1,47 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Configuration for Xilinx ZynqMP zcu102
- *
- * (C) Copyright 2015 Xilinx, Inc.
- * Michal Simek <michal.simek@xilinx.com>
- */
-
-#ifndef __CONFIG_ZYNQMP_ZCU102_H
-#define __CONFIG_ZYNQMP_ZCU102_H
-
-#define CONFIG_ZYNQ_SDHCI1
-#define CONFIG_SYS_I2C_MAX_HOPS 1
-#define CONFIG_SYS_NUM_I2C_BUSES 18
-#define CONFIG_SYS_I2C_BUSES { \
- {0, {I2C_NULL_HOP} }, \
- {0, {{I2C_MUX_PCA9544, 0x75, 0} } }, \
- {0, {{I2C_MUX_PCA9544, 0x75, 1} } }, \
- {0, {{I2C_MUX_PCA9544, 0x75, 2} } }, \
- {1, {I2C_NULL_HOP} }, \
- {1, {{I2C_MUX_PCA9548, 0x74, 0} } }, \
- {1, {{I2C_MUX_PCA9548, 0x74, 1} } }, \
- {1, {{I2C_MUX_PCA9548, 0x74, 2} } }, \
- {1, {{I2C_MUX_PCA9548, 0x74, 3} } }, \
- {1, {{I2C_MUX_PCA9548, 0x74, 4} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 0} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 1} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 2} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 3} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 4} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 5} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 6} } }, \
- {1, {{I2C_MUX_PCA9548, 0x75, 7} } }, \
- }
-
-#define CONFIG_PCA953X
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_ZYNQ_EEPROM_BUS 5
-#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54
-
-#define CONFIG_SPD_EEPROM
-#define CONFIG_DDR_SPD
-
-#include <configs/xilinx_zynqmp.h>
-
-#endif /* __CONFIG_ZYNQMP_ZCU102_H */