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path: root/arch/riscv/cpu
AgeCommit message (Expand)Author
2019-05-18CONFIG_SPL_SYS_[DI]CACHE_OFF: addTrevor Woerner
2019-05-09riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is ena...Rick Chen
2019-05-09riscv: Introduce CONFIG_XIP to support booting from flashRick Chen
2019-04-08riscv: ax25: Andes specific cache shall only support in M-modeRick Chen
2019-04-08riscv: ax25: Add platform-specific Kconfig optionsRick Chen
2019-04-08riscv: hang if relocation of secondary harts failsLukas Auer
2019-04-08riscv: do not rely on hart ID passed by previous boot stageLukas Auer
2019-04-08riscv: add support for multi-hart systemsLukas Auer
2019-04-08riscv: save hart ID in register tp instead of s0Lukas Auer
2019-04-08riscv: delay initialization of caches and debug UARTLukas Auer
2019-02-27riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systemsAnup Patel
2019-02-27riscv: Rename cpu/qemu to cpu/genericAnup Patel
2019-01-15riscv: move the AX25-specific implementation of flush_dcache_allLukas Auer
2018-12-18riscv: Save boot hart id to the global dataBin Meng
2018-12-18riscv: Return to previous privilege level after trap handlingBin Meng
2018-12-18riscv: Fix context restore before returning from trap handlerBin Meng
2018-12-18riscv: Move trap handler codes to mtrap.SBin Meng
2018-12-18riscv: Do some basic architecture level cpu initializationBin Meng
2018-12-18riscv: Update supports_extension() to use desc from cpu driverBin Meng
2018-12-18riscv: Remove non-DM version of print_cpuinfo()Bin Meng
2018-12-18riscv: Probe cpus during bootBin Meng
2018-12-18riscv: qemu: Add platform-specific Kconfig optionsBin Meng
2018-12-18riscv: ax25: Hide the ax25-specific Kconfig optionBin Meng
2018-12-18riscv: qemu: Create a simple-bus driver for the soc nodeBin Meng
2018-12-05riscv: ax25-ae350: Pass dtb address to u-boot with a1 registerRick Chen
2018-12-05riscv: Add kconfig option to run U-Boot in S-modeAnup Patel
2018-11-26riscv: cache: Implement i/dcache [status, enable, disable]Rick Chen
2018-11-26riscv: save hart ID and device tree passed by prior boot stageLukas Auer
2018-11-26riscv: do not blindly modify the mstatus CSRLukas Auer
2018-11-26riscv: remove unused labels in start.SLukas Auer
2018-11-26Drop CONFIG_INIT_CRITICALBin Meng
2018-11-26riscv: align mtvec on a 4-byte boundaryLukas Auer
2018-11-26riscv: fix inconsistent use of spaces and tabs in start.SLukas Auer
2018-10-03riscv: Move do_reset() to a common placeBin Meng
2018-10-03riscv: Add QEMU virt board supportBin Meng
2018-10-03riscv: Make start.S available for all targetsBin Meng
2018-10-03riscv: Add a helper routine to print CPU informationBin Meng
2018-10-03riscv: Fix coding style issues in the linker scriptBin Meng
2018-10-03riscv: Move the linker script to the CPU root directoryBin Meng
2018-08-20riscv: Include bss subsections in linker scriptAlexander Graf
2018-07-25efi_loader: Rename sections to allow for implicit dataAlexander Graf
2018-05-29riscv: cpu: nx25: Rename as ax25Rick Chen
2018-05-29efi_loader: Enable RISC-V supportRick Chen
2018-05-07SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini
2018-03-30riscv: ae250: Support DT provided by the board at runtimeRick Chen
2018-01-12riscv: cpu: Add nx25 to support RISC-VRick Chen